3.1.2.5 L2 Bus Input AC Specifications
Th e L2 bu s in pu t in terface AC tim in g specification s are fou n d in Table 11 .
1
Table 11. L2 Bus Input Interface AC Timing Specifications
Operating conditions are specified in Section Table 2., "Recommended Operating Conditions"
Num
Characteristic
Min
Max
Unit
Notes
29,30
L2SYNC_IN rise and fall time
—
1.0
ns
2,3
24
25
Data and parity input setup to L2SYNC_IN
L2SYNC_IN to data and parity input hold
2.0
—
—
ns
ns
0.5
Notes:
1. All input specifications are measured from the midpoint voltage (1.4V) of the signal in question to the
midpoint voltage of the rising edge of the input L2SYNC_IN. Input timings are measured at the pins
(see Figure 7 ).
2. Rise and fall times for the L2SYNC_IN input are measured from 0.4 to 2.4V.
3. Guaranteed by design and characterization, and not tested.
Figu re 7 sh ows th e L2 bu s in pu t tim in g diagram s for th e PPC750.
29
30
L2SYNC_IN
VM
24
25
ALL INPUTS
VM = Midpoint Voltage (1.4v)
Figure 7. L2 Bus Input Timing Diagrams
16 of 44
PPC740 and PPC750 Hardware Specifications
Preliminary and subject to change without notice
IBM [ IBM ]
