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IBM25CPC945CQ3C-1 参数 Datasheet PDF下载

IBM25CPC945CQ3C-1图片预览
型号: IBM25CPC945CQ3C-1
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC, CMOS, PBGA1182,]
分类和应用:
文件页数/大小: 69 页 / 1861 K
品牌: IBM [ IBM ]
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Datasheet  
Preliminary  
CPC945 Bridge and Memory Controller  
Table 4-8. Processor Interface Power Management Signal Pins  
I/O  
Supply  
Voltage  
Signal  
Levels  
Signal Name  
Signal Description  
Signal Type  
Processor sleep requests. To ensure correct operation, unused  
inputs should be pulled down.  
PI_QREQ[0:3]  
PI_QACK[0:3]  
Input  
1.3 V - 1.5 V  
1.3 V - 1.5 V  
VDD2  
VDD2  
These signals provide the CPC945 acknowledgment to processor  
sleep requests.  
Output  
Suspend request. This active-low signal is sent from the power  
management unit (under software control) to the CPC945 to  
request that the device stop all activity and enter the suspend  
(sleep) state.  
SUSPENDREQ_L  
SUSPENDACK_L  
Input  
2.5 V  
2.5 V  
VDD5  
VDD5  
Suspend acknowledgment. The CPC945 asserts this active-low  
signal back to the power management unit to indicate the suspen-  
sion request has completed.  
Output  
Table 4-9. System Support Signal Pins  
I/O  
Signal  
Type  
Signal  
Levels  
Signal Name  
Signal Description  
Supply Notes  
Voltage  
The interrupt outputs from the CPC945 to the PowerPC 970xx  
processors  
IRQ[0:3]  
Output  
Input  
1.3 V - 1.5 V VDD2  
1
NORTH_BRIDGE_  
RESET_L  
Power on reset input to CPC945  
2.5 V  
VDD5  
Note:  
1. Recommended pull-up resistor = 1.0 kΩ.  
2
Table 4-10. I C Signal Pins  
I/O  
Signal  
Type  
Signal  
Levels  
Signal Name  
Signal Description  
Supply Notes  
Voltage  
I2C slave only data bus. Used by the power management unit to  
set up the processor interface and the debug facilities. It is also a  
portal for diagnostic reads and writes to any system address.  
PI_ISCA  
I/O  
2.5 V  
VDD5  
1
PI_ISCL  
Strobe signal for PI_ISCA  
I/O  
I/O  
I/O  
2.5 V  
2.5 V  
2.5 V  
VDD5  
VDD5  
VDD5  
1
1
1
SYS_ISCA0  
SYS_ISCL0  
I2C master bus 0. Used to configure the system SDRAM.  
Strobe signal for SYS_ISCA0  
I2C master bus 1. This can also be used to configure the system  
SDRAM.  
SYS_ISCA1  
SYS_ISCL1  
I/O  
I/O  
2.5 V  
2.5 V  
VDD5  
VDD5  
1
1
Strobe signal for SYS_ISCA1  
Note:  
1. Recommended pull-up resistor = 2.05 kΩ.  
A15-6009-03  
December 18, 2007 - IBM Confidential  
Dimensions and Pin Information  
Page 41 of 69