Datasheet
Preliminary
CPC945 Bridge and Memory Controller
4.3 Signal Pins
For signal pin locations, see Table 4-16, CPC945 Bridge and Memory Controller Pin List by Signal Name, on
page 45 and Table 4-17, CPC945 Bridge and Memory Controller Pin List by Grid Position, on page 57.
Table 4-1 groups the pins by function, lists the number of pins of each type, and lists the corresponding table
for additional information in this section.
Table 4-1. CPC945 Signal Pin Overview
Pin Type
Total Pins
Reference
Table 4-2, PCIe Signal Pins, on page 36
PCI Express
DDR SDRAM
HyperTransport
73
255
88
100
100
5
Table 4-3, DDR SDRAM Signal Pins, on page 36
Table 4-4, HyperTransport Signal Pins, on page 38
Table 4-5, Processor Interface 0 Signal Pins, on page 39
Table 4-6, Processor Interface 1 Signal Pins, on page 40
Table 4-7, Processor Interface Support Signal Pins, on page 40
Table 4-8, Processor Interface Power Management Signal Pins, on page 41
Table 4-9, System Support Signal Pins, on page 41
Table 4-10, I2C Signal Pins, on page 41
Processor Interface
10
5
System Support
I2C
6
Clock and
phase-locked loop (PLL)
23
10
Table 4-11, Clock and PLL Signal Pins, on page 42
Table 4-12, JTAG and Test Support Signal Pins, on page 42
Table 4-13, Power Supply Pins, on page 43
JTAG and Test
Power Supply
(VDDx and GND)
VDD
VD2
61
82
88
17
3
VD3
VD4
VD5
GND
253
1
Other Pins
Table 4-14, Other Signal Pins, on page 43
Table 4-15, CPC945 128-Bit DIMM Slot Configuration, on page 44
No Connect
2
Table 4-16, CPC945 Bridge and Memory Controller Pin List by Signal Name, on
page 45
Pin List by Signal Names
Table 4-17, CPC945 Bridge and Memory Controller Pin List by Grid Position, on
page 57
Pin List by Grid Position
A15-6009-03
December 18, 2007 - IBM Confidential
Dimensions and Pin Information
Page 35 of 69
IBM [ IBM ]
