IBM16M32644HGA
IBM16M32734HGA
IBM16M64644HGA
IBM16M64734HGA
32/64Mx64/72 1 or 2 Bank Registered DDR SDRAM Module
Preliminary
Serial Presence Detect (Part 3 of 3)
Serial PD Data Entry
Byte #
Description
SPD Entry Value
Serial Number
Undefined
Notes
7
(Hexadecimal)
95-98 Module Serial Number
ssssssss
99-
Reserved
127
00
00
128-
Open for Customer Use
255
Undefined
1. In a registered DIMM, data is delayed an additional clock cycle due to the on-DIMM pipeline register (that is, Device CL [clock
cycles] + 1 = DIMM CAS latency).
2. cc = Checksum Data byte, 00-FF (Hex).
3. “R” = Alphanumeric revision code, A-Z, 0-9.
4. rr = ASCII coded revision code byte “R”.
5. ww = Binary coded decimal week code, 01-52 (Decimal) ‘ 01-34 (Hex).
6. yy = Binary coded decimal year code, 00-99 (Decimal) ‘ 00-63 (Hex).
7. ss = Serial number data byte, 00-FF (Hex).
8. Setup and hold values assume a 1 Volt/ns slew rate.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
19L7358.H02502
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