Preliminary
IBM13N64644HCA
IBM13N64734HCA
64M x 64/72 Two-Bank Unbuffered SDRAM Module
DC Output Load Circuit
3.3 V
1200Ω
Output
870Ω
50pF
V
OH
(DC) = 2.4V, I
OH
= -2mA
V
OL
(DC) = 0.4V, I
OL
= 2mA
DC Electrical Characteristics
Symbol
(T
A
= 0 to +70°C, V
DD
= 3.3V
±
0.3V)
x64
Parameter
Min.
RAS, CAS, WE,
A0-A9, A10/AP, A11, BA0, BA1
CK0, CK1
CK2, CK3
CKE0, CKE1
-16
-4
-4
-8
-4
-4
-2
-2
-2
0
-2
-1
-2
0
-10
2.4
Max.
+16
+4
+4
+8
+4
+4
+2
+2
+2
0
+2
+10
+2
0
+10
-
Min.
-18
-5
-4
-9
-5
-4
-3
-2
-2
-2
-2
-2
-2
-2
-10
2.4
Max.
+18
+5
+4
+9
+5
+4
+3
+2
+2
+2
+2
+10
+2
+2
+10
-
V
1
µA
µA
x72
Units Notes
I
I(L)
Input Leakage Current, any input
(0.0V
≤
V
IN
≤
V
DD
), All Other Pins
Not Under Test = 0V
S0, S1
S2, S3
DQMB1, 5
DQMB0, 2, 3, 4, 5, 6, 7
DQ0 - 63
CB0 - 7
SA0, SA1, SA2, SCL, SDA
WP
DQ0 - 63
I
O(L)
Output Leakage Current
(D
OUT
is disabled, 0.0V
≤
V
OUT
≤
V
DD
)
Output Level (LVTTL)
Output “H” Level Voltage (I
OUT
= -2.0mA)
Output Level (LVTTL)
Output “L” Level Voltage (I
OUT
= +2.0mA)
CB0 - 7
SDA
V
OH
V
OL
-
0.4
-
0.4
1. See DC output load circuit.
09K3608.F38386
7/99
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 9 of 18
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