欢迎访问ic37.com |
会员登录 免费注册
发布采购

IBM11M2645H-70 参数 Datasheet PDF下载

IBM11M2645H-70图片预览
型号: IBM11M2645H-70
PDF下载: 下载PDF文件 查看货源
内容描述: [EDO DRAM Module, 2MX64, 70ns, CMOS, PDMA168]
分类和应用: 动态存储器光电二极管内存集成电路
文件页数/大小: 29 页 / 351 K
品牌: IBM [ IBM ]
 浏览型号IBM11M2645H-70的Datasheet PDF文件第3页浏览型号IBM11M2645H-70的Datasheet PDF文件第4页浏览型号IBM11M2645H-70的Datasheet PDF文件第5页浏览型号IBM11M2645H-70的Datasheet PDF文件第6页浏览型号IBM11M2645H-70的Datasheet PDF文件第8页浏览型号IBM11M2645H-70的Datasheet PDF文件第9页浏览型号IBM11M2645H-70的Datasheet PDF文件第10页浏览型号IBM11M2645H-70的Datasheet PDF文件第11页  
Discontinued (9/98 - last order; 3/99 last ship)
IBM11M2645H
IBM11M2645HB
2M x 64 DRAM MODULE
AC Characteristics
(T
A
= 0 to +70°C, V
CC
=
3.3V
±
0.3V or 5.0V
±
0.5V)
1. V
IH
(min) and V
IL
(max) are reference levels for measuring timing of input signals. Transition times are measured between V
IH
and
V
IL
.
2. An initial pause of 200µs is required after power-up followed by 8 RAS only refresh cycles before proper device operation is
achieved. In case of using internal refresh counter, a minimum of 8 CAS before RAS refresh cycles instead of 8 RAS only refresh
cycles is required..
3. The specified timings include buffer, loading and skew delay adders: 2ns minimum, 5ns maximum delay, no pulse shrinkage to the
DRAM device timings. The data and RAS signals are not buffered, which preserves the DRAMs access specifications of 60ns and
70ns.
4. AC measurements assume t
T
= 2ns.
.
Read, Write, Read-Modify-Write and Refresh Cycles
Symbol
t
RC
t
RP
t
CP
t
RAS
t
CAS
t
ASR
t
RAH
t
ASC
t
CAH
t
RCD
t
RAD
t
RSH
t
CSH
t
CRP
t
ODD
t
DZO
t
DZC
t
T
Parameter
(Common Parameters)
-60
Min
Max
10K
10K
40
25
30
Min
124
50
10
70
12
5
8
2
10
12
10
17
53
10
25
-2
-2
2
-70
Unit
Max
10K
10K
45
30
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3
4
4
1
2
104
40
10
60
10
5
8
2
10
12
10
15
48
10
20
-2
-2
2
Notes
Random Read or Write Cycle Time
RAS Precharge Time
CAS Precharge Time
RAS Pulse Width
CAS Pulse Width
Row Address Setup Time
Row Address Hold Time
Column Address Setup Time
Column Address Hold Time
RAS to CAS Delay Time
RAS to Column Address Delay Time
RAS Hold Time
CAS Hold Time
CAS to RAS Precharge Time
OE to D
IN
Delay Time
OE Delay Time from D
IN
CAS Delay Time from D
IN
Transition Time (Rise and Fall)
1. Operation within the t
RCD
(max) limit ensures that t
RAC
(max) can be met. The t
RCD
(max) is specified as a reference point only: If t
RCD
is greater than the specified t
RCD
(max) limit, then access time is controlled by t
CAC.
2. Operation within the t
RAD
(max) limit ensures that t
RAC
(max) can be met. The t
RAD
(max) is specified as a reference point only: If t
RAD
is greater than the specified t
RAD
(max) limit, then access time is controlled by t
AA.
3. Either t
CDD
or t
ODD
must be satisfied.
4. Either t
DZC
or t
DZO
must be satisfied.
50H4197
SA14-4614-02
Released 5/96
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 7 of 29