IBM11D2360E IBM11D1360E
IBM11E2360E IBM11E1360E
1M/2M x 36 DRAM Module
Truth Table
Row
Address
Column
Address
Function
RAS
CAS
WE
All DQ, PQ bits
Standby
Read
H
L
L
H→X
X
H
L
X
X
High Impedance
Valid Data Out
Valid Data In
L
L
Row
Row
Col
Col
Early-Write
Fast Page Mode - Read:
1st Cycle
L
L
L
H→L
H→L
H→L
H
H
L
Row
N/A
Col
Col
Col
Valid Data Out
Valid Data Out
Valid Data In
Subsequent Cycles
Fast Page Mode - Write:
1st Cycle
Row
Subsequent Cycles
RAS-Only Refresh
L
H→L
L
X
H
H
L
N/A
Row
X
Col
N/A
X
Valid Data In
High Impedance
High Impedance
Data Out
L
H
L
L
L
CAS-Before-RAS Refresh
H→L
Read
Write
L→H→L
L→H→L
Row
Row
Col
Col
Hidden Refresh
Data In
Presence Detect
1M x 36
2M x 36
Pin
-60
-70
-60
-70
VSS
VSS
NC
NC
VSS
VSS
VSS
NC
NC
NC
NC
NC
PD1
PD2
PD3
PD4
NC
NC
VSS
NC
1. NC= OPEN, V = GND
ss
Absolute Maximum Ratings
Symbol
VCC
Parameter
Rating
Units
V
Notes
1
1
Power Supply Voltage
Input Voltage
-1.0 to +6.0
-1.0 to +6.0
-1.0 to +6.0
0 to +70
VIN
V
1
VOUT
TOPR
TSTG
PD
Output Voltage
V
1
Operating Temperature
Storage Temperature
Power Dissipation
°C
°C
W
1
-55 to +125
1, 2
1
4.2 (4MB) 8.4 (8MB)
50
IOUT
Short Circuit Output Current
mA
1. Stresses greater than those listed may cause permanent damage to the device. This is a stress rating only, and device functional
operation at or above the conditions indicated is not implied. Exposure to absolute maximum rating conditions for extended peri-
ods may affect reliability.
2. Maximum power occurs when all banks are active (refresh cycle).
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
50H7977
SA14-4332-02
Revised 6/96
Page 4 of 20
IBM [ IBM ]
