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Advance
256Mb Double Data Rate Synchronous DRAM
Truth Table 1a: Commands
Name (Function)
CS
H
L
RAS CAS
WE
X
Address
X
MNE
NOP
NOP
ACT
Notes
1, 9
Deselect (Nop)
X
H
L
X
H
H
L
No Operation (Nop)
H
H
H
L
X
1, 9
Active (Select Bank And Activate Row)
Read (Select Bank And Column, And Start Read Burst)
Write (Select Bank And Column, And Start Write Burst)
Burst Terminate
L
Bank/Row
Bank/Col
Bank/Col
X
1, 3
L
H
H
H
L
Read
Write
BST
1, 4
L
L
1, 4
L
H
H
L
L
1, 8
Precharge (Deactivate Row In Bank Or Banks)
Auto Refresh Or Self Refresh (Enter Self Refresh Mode)
Mode Register Set
L
L
Code
X
PRE
1, 5
L
L
H
L
AR / SR
MRS
1, 6, 7
1, 2
L
L
L
Op-Code
1. CKE is HIGH for all commands shown except Self Refresh.
2. BA0, BA1 select either the Base or the Extended Mode Register (BA0 = 0, BA1 = 0 selects Mode Register; BA0 = 1, BA1 = 0
selects Extended Mode Register; other combinations of BA0-BA1 are reserved; A0-A12 provide the op-code to be written to the
selected Mode Register.)
3. BA0-BA1 provide bank address and A0-A12 provide row address.
4. BA0, BA1 provide bank address; A0-Ai provide column address (where i = 9 for x8 and 9, 11 for x4); A10 HIGH enables the Auto
Precharge feature (nonpersistent), A10 LOW disables the Auto Precharge feature.
5. A10 LOW: BA0, BA1 determine which bank is precharged.
A10 HIGH: all banks are precharged and BA0, BA1 are “Don’t Care.”
6. This command is AUTO REFRESH if CKE is HIGH; Self Refresh if CKE is LOW.
7. Internal refresh counter controls row and bank addressing; all inputs and I/Os are “Don’t Care” except for CKE.
8. Applies only to read bursts with Auto Precharge disabled; this command is undefined (and should not be used) for read bursts with
Auto Precharge enabled or for write bursts
9. Deselect and NOP are functionally interchangeable.
Truth Table 1b: DM Operation
Name (Function)
Write Enable
Write Inhibit
DM
L
DQs
Valid
X
Notes
1
1
H
1. Used to mask write data; provided coincident with the corresponding data.
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Use is further subject to the provisions at the end of this document.
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