IBM0625164GT3B IBM0625404GT3B
IBM06254B4GT3B IBM0625804GT3B
Advance
256Mb Double Data Rate Synchronous DRAM
Extended Mode Register
The Extended Mode Register controls functions beyond those controlled by the Mode Register; these addi-
tional functions include DLL enable/disable, output drive strength selection (optional), and QFC output
enable/disable (optional). These functions are controlled via the bits shown in the Extended Mode Register
Definition. The Extended Mode Register is programmed via the Mode Register Set command (with BA0 = 1
and BA1 = 0) and retains the stored information until it is programmed again or the device loses power. The
Extended Mode Register must be loaded when all banks are idle, and the controller must wait the specified
time before initiating any subsequent operation. Violating either of these requirements result in unspecified
operation.
DLL Enable/Disable
The DLL must be enabled for normal operation. DLL enable is required during power up initialization, and
upon returning to normal operation after having disabled the DLL for the purpose of debug or evaluation. The
DLL is automatically disabled when entering self refresh operation and is automatically re-enabled upon exit
of self refresh operation. Any time the DLL is enabled, 200 clock cycles must occur before a Read command
can be issued. This is the reason 200 clock cycles must occur before issuing a Read or Write command upon
exit of self refresh operation.
Output Drive Strength
The normal drive strength for all outputs is specified to be SSTL_2, Class II. Some vendors might also sup-
port a weak driver strength option, intended for lighter load and/or point-to-point environments. I-V curves for
the normal drive strength are included in this document; the curves for weak drive strength will be included in
a future revision of this document.
QFC Enable/Disable
The QFC signal is an optional DRAM output control used to isolate module loads (DIMMs) from the system
memory bus by means of FET switches when the given module is not being accessed.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
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