IBM0612404GT3B
IBM0612804GT3B
128Mb Double Data Rate Synchronous DRAM
Advance Rev 0.2
Read to Write: CAS Latencies (Burst Length = 4 or 8)
CAS Latency = 2
CK
CK
Read
BST
NOP
Write
NOP
NOP
Command
Address
BAa, COL n
BAa, COL b
CL=2
t
(min)
DQSS
DQS
DQ
DI a-b
DOa-n
DM
CAS Latency = 2.5
CK
CK
Read
BST
NOP
NOP
Write
NOP
Command
Address
BAa, COL n
BAa, COL b
CL=2.5
t
(min)
DQSS
DQS
DQ
DOa-n
Dla-b
DM
DO a-n = data out from bank a, column n
.
DI a-b = data in to bank a, column b
1 subsequent elements of data out appear in the programmed order following DO a-n.
Data In elements are applied following Dl a-b in the programmed order, according to burst length.
Shown with nominal t , t , and t
.
DQSQ
Don’t Care
AC DQSCK
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Use is further subject to the provisions at the end of this document.
06K0566.F39350
5/00
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