IBM0418A81BLAB IBM0436A81BLAB
IBM0418A41BLAB IBM0436A41BLAB
8Mb (256Kx36 & 512x18) and 4Mb (128Kx36 & 256Kx18) SRAM
Preliminary
Revision Log
Revision
9/98
Contents of Modification
Initial release.
11/98
Updated package diagram. Changed part numbers from Rev A to B.
In Programmable Impedance Output Driver DC Electrical Characteristics on page 9:
I
I
= (V
÷ 2) ÷ ((RQ ÷ 5) + 5) ± 15% @ V = V
/ 2 For: 175Ω ≤ RQ ≤ 350Ω.
DDQ
OH
OL
DDQ
OH
2/16/99
7/13/99
= (V
÷ 2) ÷ (RQ ÷ 5) ± 15% @ V = V
/ 2 For: 175Ω ≤ RQ ≤ 350Ω
DDQ
DDQ
OL
Corrected 7 x17 BGA Dimensions.
Added 3N speed sort.
In DC Electrical Characteristics on page 8:
I
I
Changed from 120 mA to 150 mA.
Changed from 65 mA to 100 mA
SBSS
SBZZ
1/12/2000
Page 14:
Timing updated for Synchronous operation.
Page 11:
Sleep Mode Setup time spec added: t
2/09/2000
=1.0ns
ZVKH
Sleep Mode Hold time spec added: t
Page 22: Enhanced BGA diagram.
=1.0ns
KHZX
In AC Characteristics on page 11:
t
changed from 1.7 to 1.6ns.
KHQV
Added footnote 5.
, t , t
t
, t
spec changed from 0.5ns to 0.3ns
AVKH SVKH WVKH DVKH
12/05/00
12/13/00
Added footnote 6.
In ID Register Definition on page 17:
Revision Number Bits (31:28) defined as 0111.
Made various minor editorial changes and format refinements.
Returned AC Characteristics changes made in 12/05/00 document to their previous values.
crrh2519.07
12/13/00
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 24 of 25
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