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IBM0118160MJ3-70 参数 Datasheet PDF下载

IBM0118160MJ3-70图片预览
型号: IBM0118160MJ3-70
PDF下载: 下载PDF文件 查看货源
内容描述: [Fast Page DRAM, 1MX16, 70ns, CMOS, PDSO42, 0.400 INCH, SOJ-42]
分类和应用: 动态存储器光电二极管内存集成电路
文件页数/大小: 27 页 / 280 K
品牌: IBM [ IBM ]
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IBM0118160  
IBM0118160M  
IBM0118160B IBM0118160P  
1M x 16 10/10 DRAM  
Write Cycle  
-50  
-60  
-70  
Symbol  
Parameter  
Units  
Notes  
1
Min. Max. Min. Max. Min. Max.  
tWCS  
tWCH  
tWP  
Write Command Set Up Time  
Write Command Hold Time  
Write Command Pulse Width  
Write Command to RAS Lead Time  
Write Command to CAS Lead Time  
DIN Setup Time  
0
0
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
10  
10  
13  
13  
0
15  
15  
15  
15  
0
15  
15  
20  
20  
0
tRWL  
tCWL  
tDS  
2
2
tDH  
DIN Hold Time  
10  
12  
15  
1. tWCS, tRWD, tCWD, tAWD and tCPW are not restrictive operating parameters. They are included in the data sheet as electrical charac-  
teristics only. If tWCS tWCS (min), the cycle is an early write cycle and the data pin will remain open circuit (high impedance)  
through the entire cycle. If tRWD tRWD (min), tCWD tCWD (min), tAWD tAWD (min), and tCPW tCPW (min)(Fast Page Mode), the  
cycle is a Read-Modify-Write cycle and the data out will contain data read from the selected cell. If neither of the above sets of con-  
ditions are satisfied, the condition of the data out (at access time) is indeterminate.  
2. These parameters are referenced to LCAS or UCAS leading edge in early write cycles and to WE leading edge in Read-Modify-  
Write cycles.  
©IBM Corporation. All rights reserved.  
Use is further subject to the provisions at the end of this document.  
43G9388  
SA14-4209-04  
Revised 11/96  
Page 8 of 26  
 
 
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