IBM0118160
IBM0118160M
IBM0118160B IBM0118160P
1M x 16 10/10 DRAM
Revision Log
Revision
Contents Of Modification
01/94
Initial Release
Change Fast Page Mode Currents (ICC4) from 85, 75, 65, 55mA to 100, 90, 80, 70mA
06/17/94
Combine the 3.3 Volt and the 5.0 Volt specifications
Change the Refresh Period from 256ms to 128ms
09/06/94
Change ICC1, ICC3, ICC6 from 215, 195, 170, 150mA to 225, 205, 180, 160mA
1. Iout changed to +2.0 mA and -2.0 mA in DC Electrical Characteristics table.
2. Packaging diagrams modified to clarify lead thickness and standoff height.
3. t
4. t
min changed from 0 to 5ns.
min changed from 20 to 10ns.
RPC
CHR
5. Currents in DC Electrical Characteristics table revised.
6. Test Modes and Test Circuit Diagram removed.
7. Rename t
to t
.
ODD
OED
11/15/95
8. t
9. t
, t
OED CDD OEZ
, t
, and t
min changed from 20 to 15ns, for the 70ns part.
OFF
min changed from 5 to 0ns for all speed sorts.
min changed from 20 to 15ns for the 70ns part.
min changed from 5 to 10ns for all speed sorts.
RRH
OEH
CSR
10. t
11. t
12. tCAH min changed from 15 to 10ns on 60 and 70ns parts.
13. t max changed from 20 to 15ns for 70ns parts.
OFF
1. The Low Power and Standard Power Specifications were combined. ES# 43G9387 and ES# 43G9388 were
combined into ES# 43G9388.
2. Added Die Rev E part numbers.
3. tDH was reduced from 15ns to 12ns for the -60 speed sort.
4. tCHD was added to the Self Refresh Cycle with a value of 350µs for all speed sorts.
12/10/95
5. The Self Refresh timing diagram was changed to allow CAS to go high tCHD (350µs) after RAS falls entering a
Self Refresh.
6. The CBR timing diagram was changed to allow CAS to remain low for back-to-back CBR cycles.
7. WE for the Hidden Refresh Write cycle in the Truth Table was changed from “L” to ” H”.
1. ICC2 was changed from 2mA to 1mA.
2. II(L) and IO(L) were altered from +/- 10uA to +/- 5uA.
3. tT was initially at a max of 30ns. It has been modified to 50ns for all speed sorts.
4. tCPA was decreased from 30ns to 28ns for the -50 speed sort.
5. tRASP max of 125K was raised to 200K for all speed sorts.
6. tRP was changed from 35ns to 30ns for the -50 speed sort.
09/01/96
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
43G9388
SA14-4209-04
Revised 11/96
Page 26 of 26
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