1HY5DU283222BF(P)
AC CHARACTERISTICS - I (continue)
33
36
4
5
Unit Note
Parameter
Symbol
Min
15
Max
Min
14
16
9
Max
Min
13
15
8
Max
Min
10
12
7
Max
-
-
-
-
-
-
-
-
Row Cycle Time
tRC
tRFC
tRAS
CK
CK
CK
17
Auto Refresh Row Cycle Time
Row Active Time
10
100K
100K
100K
100K
Row Address to Column Address
Delay for Read
6
-
5
-
5
-
4
-
tRCDRD
CK
Row Address to Column Address
Delay for Write
3
3
1
-
-
-
2
3
1
-
-
-
2
3
1
-
-
-
2
2
1
-
-
-
tRCDWR
tRRD
CK
CK
CK
Row Active to Row Active Delay
Column Address to Column Address
Delay
tCCD
6
3
2
-
-
-
5
3
2
-
-
-
5
3
2
-
-
-
4
3
2
-
-
-
Row Precharge Time
tRP
tWR
tDRL
CK
CK
CK
Write Recovery Time
Last Data-In to Read Command
Auto Precharge Write Recovery +
Precharge Time
9
-
8
-
8
-
7
-
tDAL
tCK
CK
3.3
-
10
-
3.6
-
10
-
4
10
-
-
-
CL=4
System Clock Cycle Time
CL=3
ns
ns
CK
CK
ns
ns
-
5
10
0.45
0.45
-0.6
-0.6
0.55
0.55
0.6
0.6
0.45
0.45
-0.6
-0.6
0.55
0.55
0.6
0.6
0.45
0.45
-0.6
-0.6
0.55
0.55
0.6
0.6
0.45
0.45
-0.6
-0.6
0.55
0.55
0.6
0.6
Clock High Level Width
tCH
tCL
Clock Low Level Width
Data-Out edge to Clock edge Skew
DQS-Out edge to Clock edge Skew
tAC
tDQSCK
DQS-Out edge to
Data-Out edge Skew
tDQSQ
-
0.35
-
0.4
-
0.4
-
0.4
ns
tHPmin
-tQHS
tHPmin
-tQHS
tHPmin
-tQHS
tHPmin
-tQHS
-
-
-
-
-
-
-
-
1,6
1,5
Data-Out hold time from DQS
Clock Half Period
tQH
tHP
ns
ns
tCH/L
min
tCH/L
min
tCH/L
min
tCH/L
min
-
0.35
-
-
0.4
-
-
0.4
-
-
0.4
-
6
2
2
Data Hold Skew Factor
Input Setup Time
tQHS
tIS
ns
ns
0.75
0.75
0.4
0.75
0.75
0.4
0.75
0.75
0.4
0.75
0.75
0.4
-
-
-
-
Input Hold Time
tIH
ns
0.6
0.6
1.15
0.6
0.6
1.15
0.6
0.6
1.15
0.6
0.6
1.15
Write DQS High Level Width
Write DQS Low Level Width
Clock to First Rising edge of DQS-In
tDQSH
tDQSL
tDQSS
CK
CK
CK
0.4
0.4
0.4
0.4
0.85
0.85
0.85
0.85
Data-In Setup Time to DQS-In
(DQ & DM)
0.35
-
0.4
-
0.4
-
0.4
-
3
tDS
ns
Rev. 1.2 / Jul. 2005
26
HYNIX [ HYNIX SEMICONDUCTOR ]
