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HY5DU281622ET-5 参数 Datasheet PDF下载

HY5DU281622ET-5图片预览
型号: HY5DU281622ET-5
PDF下载: 下载PDF文件 查看货源
内容描述: 128M ( 8Mx16 ) GDDR SDRAM [128M(8Mx16) GDDR SDRAM]
分类和应用: 存储内存集成电路光电二极管动态存储器双倍数据速率时钟
文件页数/大小: 34 页 / 379 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
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HY5DU281622ET  
OPERATION COMMAND TRUTH TABLE - IV  
Current  
State  
/CS  
/RAS  
/CAS  
/WE  
Address  
Command  
Action  
ILLEGAL11  
ILLEGAL11  
ILLEGAL11  
ILLEGAL11  
L
L
L
L
H
L
L
L
L
H
H
L
L
H
L
BA, CA, AP  
BA, RA  
BA, AP  
X
WRITE/WRITEAP  
ACT  
WRITE  
PRE/PALL  
AREF/SREF  
H
ILLEGAL11  
L
H
L
L
X
H
H
L
X
H
H
L
X
H
L
OPCODE  
MRS  
DSEL  
NOP  
BST  
X
X
X
NOP - Enter IDLE after tMRD  
NOP - Enter IDLE after tMRD  
ILLEGAL11  
ILLEGAL11  
ILLEGAL11  
ILLEGAL11  
ILLEGAL11  
ILLEGAL11  
ILLEGAL11  
L
L
L
L
L
L
L
H
H
L
L
L
H
L
BA, CA, AP  
BA, CA, AP  
BA, RA  
BA, AP  
READ/READAP  
WRITE/WRITEAP  
ACT  
MODE  
REGISTER  
ACCESSING  
H
H
L
H
L
L
PRE/PALL  
AREF/SREF  
MRS  
L
H
L
X
L
L
OPCODE  
Note :  
1. H - Logic High Level, L - Logic Low Level, X - Don’t Care, V - Valid Data Input, BA - Bank Address, AP - AutoPrecharge Address,  
CA - Column Address, RA - Row Address, NOP - NO Operation.(see note 12)  
2. All entries assume that CKE was active(high level) during the preceding clock cycle.  
3. If both banks are idle and CKE is inactive(low level), then in power down mode.  
4. Illegal to bank in specified state. Function may be legal in the bank indicated by Bank Address(BA) depending on the state of that  
bank.  
5. If both banks are idle and CKE is inactive(low level), then self refresh mode.  
6. Illegal if tRCD is not met.  
7. Illegal if tRAS is not met.  
8. Must satisfy bus contention, bus turn around, and/or write recovery requirements.  
9. Illegal if tRRD is not met.  
10. Illegal for single bank, but legal for other banks in multi-bank devices.  
11. Illegal for all banks.  
12. In here, Don’t Care means logical value only, it doesn’t mean ’Don’t care for DC level of each signals. DC level should be out of  
VIHmin ~ VILmax  
Rev. 0.5 / Jan. 2005  
12  
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