HL15604
2) Control Registers
Bias Selection Register
DR
0
Bias Selection
1/3 Bias
1
1/2 Bias
Key Scan / Segment output Selection Register
Control Data
Output Pin Status
KS1/SEG40 KS2/SEG41
Maximum number of Input Pins
K0
0
K1
0
KS1
SEG40
SEG40
KS2
KS2
SEG41
30
25
20
0
1
1
X
Port Mode Register
Control Data
Output Pin Status
SEG2/ P2 SEG3/ P3
SEG2 SEG3
P0
0
P1
0
SEG1/ P1
SEG1
P1
SEG4/ P4
SEG4
SEG4
SEG4
P4
0
1
P2
P2
P2
SEG3
P3
P3
1
0
P1
P1
1
1
Port Data Register
Output Pin Port Data Register
SEG1 / P1
SEG2 / P2
SEG3 / P3
SEG4 / P4
D1
D5
D9
D13
Sleep Mode Control Register
Control Data
Output Pin Status
KS1 KS2 KS3 KS4 KS5 KS6
OSC
Oscillator
Normal Operating
SEG / COMMON
Output
Mode
S0
0
S1
0
Operating
H
L
L
H
L
H
L
H
L
H
L
H
H
H
H
0
1
Sleep
Sleep
Sleep
Stopped
Stopped
Stopped
L
L
L
1
0
L
H
L
H
L
H
H
H
1
1
H
11
HYNIX [ HYNIX SEMICONDUCTOR ]
