GMS90 Series
CPU
The GMS90 series is efficient both as a controller and as an arithmetic processor. It has extensive facilities for
binary and BCD arithmetic and excels in its bit-handling capabilities. Efficient use of program memory results
from an instruction set consisting of 44% one-byte, 41% two-byte, and 15% three-byte instructions. With a 12
MHz crystal, 58% of the instructions are executed in 1.0µs (40MHz: 300ns).
Special Function Register PSW
LSB
0
MSB
7
Bit No.
6
5
4
3
2
1
Addr. D0
H
PSW
CY AC F0 RS1 RS0 OV F1
P
Bit
Function
Carry Flag
CY
AC
F0
Auxiliary Carry Flag
(for BCD operations)
General Purpose Flag
Register Bank select control bits
RS1
RS0
0
0
1
1
0
1
0
1
Bank 0 selected, data address 00H - 07H
Bank 1 selected, data address 08H - 0FH
Bank 2 selected, data address 10H - 17H
Bank 3 selected, data address 18H - 1FH
Overflow Flag
OV
F1
P
General Purpose Flag
Parity Flag
Set/cleared by hardware each instruction cycle to indicate an odd/even
number of "one" bits in the accumulator, i.e. even parity.
Reset value of PSW is 00H.
12
Dec. 1998 Ver 3.0
HYNIX [ HYNIX SEMICONDUCTOR ]
