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GMS87C2120 参数 Datasheet PDF下载

GMS87C2120图片预览
型号: GMS87C2120
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS单芯片8位微控制器与A / D转换器和VFD驱动器 [CMOS Single-Chip 8-Bit Microcontroller with A/D Converter & VFD Driver]
分类和应用: 驱动器转换器微控制器
文件页数/大小: 92 页 / 1757 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
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Hyundai Micro Electronics  
GMS81C2020/GMS81C2120  
15.5 16-bit Capture Mode  
16-bit capture mode is the same as 8-bit capture, except  
that the Timer register is being run will 16 bits.  
In 16-bit mode, the bits T1CK1,T1CK0 and 16BIT of TM1  
should be set to "1" respectively.  
The clock source of the Timer 0 is selected either internal  
or external clock by bit T0CK2, T0CK1 and T0CK0.  
ADDRESS : D0H  
RESET VALUE : --000000  
-
-
CAP0  
1
T0CK2  
X
T0CK1  
X
T0CK0  
X
T0CN  
X
T0ST  
X
TM0  
TM1  
-
-
ADDRESS : D2H  
RESET VALUE : 00000000  
POL  
X
16BIT  
1
PWM1E  
0
CAP1  
X
T1CK1  
1
T1CK0  
1
T1CN  
X
T1ST  
X
X : The value "0" or "1" corresponding your operation.  
T1CK[1:0]  
T0CK[2:0]  
Edge Detector  
T0ST  
T0CN  
0 : Stop  
1 : Clear and Start  
1
11  
CLEAR  
EC0  
fXI  
T0 + T1 ( 16-bit )  
MUX  
2
÷
÷
÷
÷
÷
÷
÷
XX  
4
TIMER 0  
INTERRUPT  
T0IF  
8
1
2
8
÷
÷
÷
COMPARATOR  
fXI  
32  
128  
512  
2048  
CAPTURE  
CDR1  
( 8-bit )  
TDR1  
( 8-bit )  
CDR0  
TDR0  
( 8-bit )  
( 8-bit )  
INT 0  
INTERRUPT  
INT0IF  
INT0  
IEDS[1:0]  
Figure 15-9 16-bit Capture Mode  
15.6 PWM Mode  
The GMS81C2020 and GMS81C2120 has a high speed  
PWM (Pulse Width Modulation) functions which shared  
with Timer1.  
And writes duty value to the T1PDR and the  
PWM1HR[1:0] same way.  
The T1PDR is configured as a double buffering for glitch-  
less PWM output. In Figure 15-10 , the duty data is trans-  
fered from the master to the slave when the period data  
matched to the counted value. ( i.e. at the beginning of next  
duty cycle )  
In PWM mode, pin R56/PWM1O/T1O outputs up to a 10-  
bit resolution PWM output. This pin should be configured  
as a PWM output by setting "1" bit PWM1O in  
R5FUNC.6 register.  
PWM Period = [ PWM1HR[3:2]T1PPR ] X Source Clock  
PWM Duty = [ PWM1HR[1:0]T1PDR ] X Source Clock  
The period of the PWM output is determined by the  
T1PPR (PWM1 Period Register) and PWM1HR[3:2]  
(bit3,2 of PWM1 High Register) and the duty of the PWM  
output is determined by the T1PDR (PWM1 Duty Regis-  
ter) and PWM1HR[1:0] (bit1,0 of PWM1 High Register).  
The relation of frequency and resolution is in inverse pro-  
portion. Table 15-2 shows the relation of PWM frequency  
vs. resolution.  
The user writes the lower 8-bit period value to the T1PPR  
and the higher 2-bit period value to the PWM1HR[3:2].  
Nov. 1999 Ver 0.0  
preliminary  
57  
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