HYUNDAI MicroElectronics
GMS81C2012/GMS81C2020
Source
clock
00 01
02
03
04
05
7F
81
00 01
02
03
T1
80
3FF
PWM1E
T1ST
T1CN
PWM1O
[POL=1]
PWM1O
[POL=0]
Duty Cycle [ 80H x 250nS = 32uS ]
Period Cycle [ 3FFH x 250nS = 255.75uS, 3.9KHz ]
T1CK[1:0] = 00 ( fXI )
PWM1HR = 0CH
T1PPR (8-bit)
Period PWM1HR3 PWM1HR2
1
1
FFH
T1PPR = FFH
T1PDR = 80H
T1PDR (8-bit)
80H
PWM1HR1 PWM1HR0
Duty
0
0
Figure 12-13 Example of PWM at 4MHz
T1CK[1:0] = 10 ( 1uS )
PW M 1HR = 00H
T1PPR = 0EH
T1PDR = 05H
Write T1PPR to 0AH
Period changed
Source
clock
T1
01 02 03 04
05
06 07 08 09 0A 0B 0C 0D
0E
01 02 03 04
05
06 07 08 09
0A
01 02 03 04
05
PWM1O
POL=1
Duty Cycle
[ 05H x 2uS = 10uS ]
Duty Cycle
[ 05H x 2uS = 10uS ]
Duty Cycle
[ 05H x 2uS = 10uS ]
Period Cycle [ 0EH x 2uS = 28uS, 35.5KHz ]
Period Cycle [ 0AH x 2uS = 20uS, 50KHz ]
Figure 12-14 Example of Changing the Period in Absolute Duty Cycle (@4MHz)
MAR. 2000 Ver 1.00
61
HYNIX [ HYNIX SEMICONDUCTOR ]
