HYUNDAI MicroElectronics
8-bit Event Counter Mode
GMS81C2012/GMS81C2020
In this mode, counting up is started by an external trigger.
This trigger means falling edge or rising edge of the EC0
pin input. Source clock is used as an internal clock selected
with timer mode register TM0. The contents of timer data
register TDR0 is compared with the contents of the up-
counter T0. If a match is found, an timer interrupt request
flag T0IF is generated, and the counter is cleared to “0”.
The counter is restart and count up continuously by every
falling edge or rising edge of the EC0 pin input.
In order to use event counter function, the bit 2 of the R5
function register (R5FUNC.2) is required to be set to “1”.
After reset, the value of timer data register TDR0 is unde-
fined, it should be initialized to between 1H~FFHꢂꢁnot to
"0"The interval period of Timer is calculated as below
equation.
1
----------
Period (sec) =
× 2 × Divide Ratio × TDR0
f
XIN
The maximum frequency applied to the EC0 pin is fXIN/2
[Hz].
Start count
EC pin input
n
1
1
2
Up-counter
0
2
n-1
n
0
TDR1
n
T1IF interrupt
Figure 12-5 Event Counter Mode Timing Chart
TDR1
enable
disable
clear & start
stop
TIME
Timer 1 (T1IF)
Interrupt
Occur interrupt
Occur interrupt
T1ST
Start & Stop
T1ST = 1
T1ST = 0
T1CN
T1CN = 1
Control count
T1CN = 0
Figure 12-6 Count Operation of Timer / Event counter
MAR. 2000 Ver 1.00
53
HYNIX [ HYNIX SEMICONDUCTOR ]
