GMS82512/16/24
HYUNDAI MicroElectronics
C.3 Alphabetic order table of instruction
OP
CODE
BYTE CYCLE
FLAG
NVGBHIZC
NO.
MNENONIC
OPERATION
NO.
2
2
2
3
3
2
2
1
2
2
2
2
3
3
2
2
1
3
3
1
2
2
3
2
3
2
3
NO
1
ADC #imm
ADC dp
04
05
06
07
15
16
17
14
1D
84
85
86
87
95
96
97
94
8B
8B
08
09
19
18
y2
y3
x2
x3
2
Add with carry.
2
3
A ꢀ A + (M) + C
3
4
5
6
7
8
ADC dp + X
ADC !abs
ADC !abs+Y
ADC [dp+X]
ADC [dp]+Y
ADC {X}
4
4
5
6
6
3
NV - - H - ZC
9
ADDW dp
AND #imm
AND dp
5
NV - - H - ZC
N - - - - - Z -
16-bits add without carry : YA ꢀ YA + (dp+1)(dp)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
2
Logical AND
3
A ꢀ A ꢄ (M)
AND dp + X
AND !abs
AND !abs+Y
AND [dp+X]
AND [dp] + Y
AND {X}
4
4
5
6
6
3
AND1 M.bit
AND1B M.bit
ASL A
ASL dp
ASL dp + X
ASL !abs
BBC A.bit,rel
BBC dp.bit,rel
BBS A.bit,rel
BBS dp.bit,rel
4
- - - - - - - C
- - - - - - - C
Bit AND C-flag : C ꢀ C ꢄ (M.bit)
Bit AND C-flag and NOT : C ꢀ C ꢄ (M.bit)
Arithmetic shift left
4
2
4
5
5
4/6
5/7
4/6
5/7
C
7 6 5 4 3 2 1 0
ꢀ ꢀ ꢀ ꢀ ꢀ ꢀ ꢀ ꢀ ꢀ ꢀ "0"
N - - - - - ZC
Branch if bit clear :
- - - - - - - -
- - - - - - - -
if(bit) = 0, then PC ꢀ PC + rel
Branch if bit clear :
if(bit) = 1, then PC ꢀ PC + rel
Branch if carry bit clear :
if(C) = 0, then PC ꢀ PC + rel
Branch if carry bit set : If (C) =1, then PC ꢀ PC + rel
Branch if equal : if (Z) = 1, then PC ꢀ PC + rel
Bit test A with memory :
28
BCC rel
50
2
2/4
MM - - - - Z -
29
30
31
32
33
34
35
36
37
BCS rel
BEQ rel
BIT dp
BIT !abs
BMI rel
BNE rel
BPL rel
BRA rel
BRK
D0
F0
0C
1C
90
70
10
2F
0F
2
2
2
3
2
2
2
2
1
2/4
2/4
4
- - - - - - - -
- - - - - - - -
MM - - - - Z -
5
Z ꢀ A ꢄ M, N ꢀ (M7), V ꢀ (M6)
2/4
2/4
2/4
4
- - - - - - - -
- - - - - - - -
- - - - - - - -
- - - - - - - -
Branch if munus : if (N) = 1, then PC ꢀ PC + rel
Branch if not equal : if (Z) = 0, then PC ꢀ PC + rel
Branch if not minus : if (N) = 0, then PC ꢀ PC + rel
Branch always : PC ꢀ PC + rel
8
Software interrupt:
B ꢀ “1”, M(SP) ꢀ (PCH), SP ꢀ SP - 1,
- - - 1 - 0 - -
M(s) ꢀ (PCL), SP ꢀ S - 1, M(SP) ꢀ PSW,
SP ꢀ SP - 1, PCL ꢀ (0FFDEH), PCH ꢀ (0FFDFH)
Branch if overflow bit clear :
38
39
BVC rel
BVS rel
30
B0
2
2
2/4
2/4
- - - - - - - -
- - - - - - - -
If (V) = 0, then PC ꢀ PC + rel
Branch if overflow bit set :
If (V) = 1, then PC ꢀ PC + rel
ix
FEB. 2000 Ver 1.00
HYNIX [ HYNIX SEMICONDUCTOR ]
