HYUNDAI MicroElectronics
GMS82512/16/24
Initial Value
Address
Register Name
Power fail detection register
Symbol
R/W
Page
7 6 5 4 3 2 1 0
- - - - 1 1 0 0
00F9
PFDR
R/W
page 61
Table 8-1 Control Registers
Registers are controlled by byte manipulation instruction such as LDM etc., do not use bit manipulation
instruction such as SET1, CLR1 etc. If bit manipulation instruction is used on these registers,
content of other seven bits are may varied to unwanted value.
W
R/W
Registers are controlled by both bit and byte manipulation instruction.
- : this bit location is reserved.
FEB. 2000 Ver 1.00
23
HYNIX [ HYNIX SEMICONDUCTOR ]
