HYUNDAI MicroElectronics
8.3 Data Memory
GMS82512/16/24
Figure 8-8 shows the internal Data Memory space availa-
ble. Data Memory is divided into four groups, a user RAM,
control registers, Stack, and LCD memory.
Note that unoccupied addresses may not be implemented
on the chip. Read accesses to these addresses will in gen-
eral return random data, and write accesses will have an in-
determinate effect.
0000
H
More detailed informations of each register are explained
in each peripheral section.
User Memory
Note: Write only registers can not be accessed by bit ma-
nipulation instruction. Do not use read-modify-write instruc-
tion. Use byte manipulation instruction, for example “LDM”.
PAGE0
When “G-flag=0”,
this page is selected
00BF
00C0
H
H
Control
Registers
00FF
0100
H
Example; To write at CKCTLR
H
LDM
CLCTLR,#09H;Divide ratio(÷32)
User Memory
or Stack Area
PAGE1 When “G-flag=1”
Stack Area
The stack provides the area where the return address is
saved before a jump is performed during the processing
routine at the execution of a subroutine call instruction or
the acceptance of an interrupt.
01FF
H
Figure 8-8 Data Memory Map
When returning from the processing routine, executing the
subroutine return instruction [RET] restores the contents of
the program counter from the stack; executing the interrupt
return instruction [RETI] restores the contents of the pro-
gram counter and flags.
User Memory
The GMS825xx has 448 × 8 bits for the user memory
(RAM).
Control Registers
The save/restore locations in the stack are determined by
the stack pointed (SP). The SP is automatically decreased
after the saving, and increased before the restoring. This
means the value of the SP indicates the stack location
number for the next save. Refer to Figure 8-4 on page 17.
The control registers are used by the CPU and Peripheral
function blocks for controlling the desired operation of the
device. Therefore these registers contain control and status
bits for the interrupt system, the timer/ counters, analog to
digital converters and I/O ports. The control registers are in
address range of 0C0H to 0FFH.
FEB. 2000 Ver 1.00
21
HYNIX [ HYNIX SEMICONDUCTOR ]
