GMS81C1102/GMS81C1202
3. 16-BIT OPERATION
FLAG
OP BYTE CYCLE
NO.
1
MNEMONIC
ADDW dp
OPERATION
16-Bits add without carry
NVGBHIZC
CODE NO
NO
1D
5D
BD
9D
7D
DD
3D
2
2
2
2
2
2
2
5
NV--H-ZC
YA ← ( YA ) + ( dp +1 ) ( dp )
Compare YA contents with memory pair contents :
(YA) − (dp+1)(dp)
2
3
4
5
6
7
CMPW dp
DECW dp
INCW dp
LDYA dp
STYA dp
SUBW dp
4
6
6
5
5
5
N-----ZC
N-----Z-
N-----Z-
N-----Z-
--------
NV--H-ZC
Decrement memory pair
( dp+1)( dp) ← ( dp+1) ( dp) - 1
Increment memory pair
( dp+1) ( dp) ← ( dp+1) ( dp ) + 1
Load YA
YA ← ( dp +1 ) ( dp )
Store YA
( dp +1 ) ( dp ) ← YA
16-Bits substact without carry
YA ← ( YA ) - ( dp +1) ( dp)
4. BIT MANIPULATION
OP BYTE CYCLE
FLAG
NO.
1
MNEMONIC
AND1 M.bit
OPERATION
NVGBHIZC
CODE NO
NO
8B
8B
0C
1C
y1
3
3
2
3
2
2
1
1
1
3
3
3
3
3
3
3
2
2
1
1
3
4
Bit AND C-flag : C ← ( C ) ( M .bit )
Bit AND C-flag and NOT : C ← ( C ) ~( M .bit )
Bit test A with memory :
-------C
-------C
MM----Z-
2
4
4
5
4
2
2
2
2
5
5
4
4
5
5
5
4
2
2
2
6
AND1B M.bit
BIT dp
3
Z ← ( A ) ( M ) , N ← ( M ) , V ← ( M )
4
7
6
BIT !abs
5
Clear bit : ( M.bit ) ← “0”
Clear A bit : ( A.bit )← “0”
Clear C-flag : C ← “0”
Clear G-flag : G ← “0”
Clear V-flag : V ← “0”
--------
--------
-------0
--0-----
-0--0---
-------C
-------C
-------C
-------C
--------
-------C
-------C
--------
--------
-------1
--1-----
--------
CLR1 dp.bit
CLRA1 A.bit
CLRC
6
2B
20
7
8
40
CLRG
9
80
CLRV
10
11
12
13
14
15
16
17
18
19
20
21
AB
AB
CB
CB
4B
6B
6B
x1
Bit exclusive-OR C-flag : C ← ( C )
( M .bit )
EOR1 M.bit
EOR1B M.bit
LDC M.bit
LDCB M.bit
NOT1 M.bit
OR1 M.bit
OR1B M.bit
SET1 dp.bit
SETA1 A.bit
SETC
Bit exclusive-OR C-flag and NOT : C ← ( C ) ~(M .bit)
Load C-flag : C ← ( M .bit )
Load C-flag with NOT : C ← ~( M .bit )
Bit complement : ( M .bit ) ← ~( M .bit )
Bit OR C-flag : C ← ( C ) ( M .bit )
Bit OR C-flag and NOT : C ← ( C ) ~( M .bit )
Set bit : ( M.bit ) ← “1”
0B
A0
C0
EB
Set A bit : ( A.bit ) ← “1”
Set C-flag : C ← “1”
Set G-flag : G ← “1”
SETG
Store C-flag : ( M .bit ) ←
C
STC M.bit
Test and clear bits with A :
A - ( M ) , ( M ) ← ( M ) ~( A )
22
23
5C
3C
3
3
6
6
N-----Z-
N-----Z-
TCLR1 !abs
TSET1 !abs
Test and set bits with A :
A - ( M ) , ( M ) ← ( M ) ( A )
Jan. 2002 Ver 2.0
v
HYNIX [ HYNIX SEMICONDUCTOR ]
