GMS81C1102 / GMS81C1202
13. I/O PORTS
The GMS81C1202 has three ports, RA, RB and RC. These
ports pins may be multiplexed with an alternate function
for the peripheral features on the device. In general, when
a initial reset state, all ports are used as a general purpose
input port.
Reading data register reads the status of the pins whereas
writing to it will write to the port latch.
WRITE "55H" TO PORT RA DIRECTION REGISTER
0
7
1
6
0
5
1
4
0
3
1
2
0
1
1
0
C0H
C1H
C2H
C3H
RA DATA
RA DIRECTION
RB DATA
BIT
All pins have data direction registers which can set these
ports as output or input. A “1” in the port direction register
defines the corresponding port pin as output. Conversely,
write “0” to the corresponding bit to specify as an input
pin. For example, to use the even numbered bit of RA as
output ports and the odd numbered bits as input ports, write
“55H” to address C1H (RA direction register) during initial
setting as shown in Figure 13-1.
I
O
6
I
O
4
I
O
2
I
O
RB DIRECTION
7
5
3
1
0 PORT
I : INPUT PORT
O : OUTPUT PORT
Figure 13-1 Example of port I/O assignment
13.1 RA and RAIO registers
RA is an 8-bit bidirectional I/O port (address C0H). Each
port can be set individually as input and output through the
RAIO register (address C1H).
may be used as general I/O ports. To select alternate func-
tion such as Analog Input or External Event Counter Input,
write "1" to the corresponding bit of RAFUNC.Regardless
of the direction register RAIO, RAFUNC is selected to use
as alternate functions, port pin can be used as a correspond-
ing alternate features ( RA0/EC0 is controlled by RB-
FUNC )
RA7~RA1 ports are multiplexed with Analog Input Port
( AN7~AN1 ) and RA0 port is multiplexed with Event
Counter Input Port ( EC0 ).
ADDRESS : C0H
RESET VALUE : Undefined
RA Data Register
PORT
RAFUNC.7~0
Description
RA
RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
RA7 ( Normal I/O Port )
AN7 ( ADS2~0=111 )
RA6 ( Normal I/O Port )
AN6 ( ADS2~0=110 )
RA5 ( Normal I/O Port )
AN5 ( ADS2~0=101 )
RA4 ( Normal I/O Port )
AN4 ( ADS2~0=100 )
RA3 ( Normal I/O Port )
AN3 ( ADS2~0=011 )
RA2 ( Normal I/O Port )
AN2 ( ADS2~0=010 )
RA1 ( Normal I/O Port )
AN1 ( ADS2~0=001 )
RA0 ( Normal I/O Port )
EC0 ( T0CK2~0=111 )
RA7/AN7
INPUT / OUTPUT DATA
ADDRESS : C1H
RA6/AN6
RA5/AN5
RA4/AN4
RA3/AN3
RA2/AN2
RA1/AN1
RA Direction Register
RESET VALUE : 00000000
RAIO
RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0
DIRECTION SELECT
0 : INPUT PORT
1 : OUTPUT PORT
RA Function Selection Register
RAFUNC
ADDRESS : CAH
RESET VALUE : 00000000
ANSEL7 ANSEL6 ANSEL5 ANSEL4 ANSEL3 ANSEL2 ANSEL1 ANSEL0
0 : RA4
1 : AN4
0 : RB0
1 : AN0
0 : RA1
1 : AN1
0 : RA2
1 : AN2
0 : RA3
1 : AN3
0 : RA5
1 : AN5
0 : RA6
1 : AN6
0 : RA7
1 : AN7
1
RA0/EC0
1. This port is
, but Event Counter
not an Analog Input port
clock source input port. ECO is controlled by setting
TOCK2~0 = 111.
Figure 13-2 Registers of Port RA
The bit RAFUNC.0 (ANSEL0) controls the RB0/AN0/AVref
The control register RAFUNC (address CAH) controls to
select alternate function. After reset, this value is "0", port
.
port ( Refer to Port RB)
38
Jan. 2002 ver 2.0
HYNIX [ HYNIX SEMICONDUCTOR ]
