GM71V17403C
GM71VS17403CL
Capacitance (VCC = 3.3V +/- 0.3V, TA = 25C)
Symbol
CI1
Parameter
Input Capacitance (Address)
Input Capacitance (Clocks)
Output Capacitance (Data-In/Out)
Min
Max
Unit
pF
Note
1
-
-
-
5
7
7
CI2
pF
1
CI/O
pF
1, 2
Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. CAS = VIH to disable DOUT
.
AC Characteristics (VCC = 3.3V +/- 0.3V, VSS = 0V, TA = 0 ~ 70C, Notes 1, 2, 18)
Test Conditions
Input rise and fall times : 2ns
Input levels : VIL = 0V, VIH = 3V
Input timing reference levels : 0.8V, 2.0V
Output timing reference levels : 0.8V, 2.0V
Output load : 1 TTL gate + C (100pF)
(Including scope and jig)
L
Read, Write, Read-Modify-Write and Refresh Cycles (Common Parameters)
GM71V(S)17403 GM71V(S)17403 GM71V(S)17403
C/CL-5 C/CL-6 C/CL-7
Unit Note
Symbol
Parameter
Min Max Min Max Min Max
t
RC
Random Read or Write Cycle Time
RAS Precharge Time
84
30
-
-
104
40
-
-
124
50
-
-
ns
ns
tRP
CAS Precharge Time
8
-
10
60
-
13
70
-
ns
t
CP
ns
ns
ns
t
RAS
CAS
ASR
RAH
ASC
CAH
RCD
RAD
RSH
CSH
CRP
ODD
DZO
DZC
RAS Pulse Width
50 10,000
10,000
10,000
t
CAS Pulse Width
8 10,000 10 10,000
13 10,000
t
Row Address Set up Time
Row Address Hold Time
Column Address Set-up Time
0
8
0
8
-
-
-
-
0
10
0
-
-
-
-
0
10
0
-
-
-
-
t
ns
ns
ns
t
Column Address Hold Time
RAS to CAS Delay Time
RAS to Column Address Delay Time
RAS Hold Time
10
13
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
12 37
10 25
14 45
12 30
14 52
12 35
3
4
t
t
10
35
-
-
13
40
5
-
-
13
45
5
-
-
t
CAS Hold Time
t
t
CAS to RAS Precharge Time
OE to DIN Delay Time
5
-
-
-
t
13
0
-
15
0
-
18
0
-
5
6
6
7
OE Delay Time from DIN
CAS Delay Time from DIN
Transition Time (Rise and Fall)
-
-
-
t
0
-
0
-
0
-
t
tT
2
50
2
50
2
50
Rev 0.1 / Apr’01
HYNIX [ HYNIX SEMICONDUCTOR ]
