1.5A, 280kHz, Boost Regulator
LM5171
COMPONENT SELECTION
Frequency Compensation
The goal of frequency compensation is to achieve desirable transient response and DC regulation while
ensuring the stability of the system. A typical compensation network, as shown in Figure 23, provides a
frequency response of two poles and one zero. This frequency response is further illustrated in the Bode plot
shown in Figure 24.
VC
R1
LM5171
C2
C1
AGND
Figure 23. A Typical Compensation Network
The high DC gain in Figure 24 is desirable for achieving DC accuracy over line and load variations. The DC
gain of a transconductance error amplifier can be calculated as follows:
GainDC = Gm × RO
where:
GM = error amplifier transconductance;
RO = error amplifier output resistance ≈ 1 MΩ.
The low frequency pole, fP1, is determined by the error amplifier output resistance and C1 as:
1
fP1
=
=
2πC1RO
The first zero generated by C1 and R1 is:
1
fZ1
2πC1R1
The phase lead provided by this zero ensures that the loop has at least a 45° phase margin at the crossover
frequency. Therefore, this zero should be placed close to the pole generated in the power stage which can be
identified at frequency:
1
f p =
2πCO RLOAD
where:
CO = equivalent output capacitance of the error amplifier≈120pF;
R
LOAD= load resistance.
Dec. 2010 - Rev. 1.2.1
- 11 -
HTC
HTC [ HTC KOREA TAEJIN TECHNOLOGY CO. ]
