HI-SINCERITY
MICROELECTRONICS CORP.
Spec. No. : Preliminary Data
Issued Date : 1998.07.01
Revised Date : 1999.08.01
Page No. : 1/5
H603AL
N-Channel Logic Level Enhancement Mode Field Effect Transistor
Description
This very high density process has been especially tailored to minimize on-
state resistance and provide superior switching performance. These
devices are particularly suited for low voltage applications such as DC/DC
converters and other battery powered circuits where fast switching, low in-
line power loss, and resistance to transients are needed.
Absolute Maximum Ratings
(Ta=25°C)
•
Maximum Temperatures
Operating and Storage Temperature ................................................................................ -65 ~ +175
°C
•
Maximum Power Dissipation
Total Power Dissipation at Tc=25°C ............................................................................................... 60 W
Derate Above 25°C ................................................................................................................ 0.4 W /
°C
•
Maximum Voltages and Currents
Drain-Source Voltage ...................................................................................................................... 30 V
Gate-Source Voltage -Continuous................................................................................................
±
20 V
Drain Current -Continuous .............................................................................................................. 30 A
Drain Current -Pulsed ................................................................................................................... 100 A
Thermal Resistance, Junction-to-Case .................................................................................. 2.5
°C
/ W
Thermal Resistance, Junction-to-Ambient............................................................................ 62.5
°C
/ W
Electrical Characteristics
•
Off Characteristics
Symbol
Parameter
BV
DSS
Drain-Source Breakdown Voltage
I
DSS
Zero Gate Voltage Drain Current
+I
GSS
Gate-Body Leakage, Forward
-I
GSS
Gate-Body Leakage, Reverse
•
On Characteristics
V
GS(TH)
Gate Threshold Voltage
V
DS
=V
GS
, I
D
=250uA
V
DS
=V
GS
, I
D
=10mA
V
GS
=10V, I
D
=25A
V
GS
=4.5V, I
D
=10A
V
GS
=10V, V
DS
=10V
V
GS
=4.5V, V
DS
=10V
V
DS
=10V, I
D
=25A
1.1
1.4
-
-
60
15
-
-
-
-
-
3
-
3
0.018 0.022
0.029 0.040
-
-
-
-
26
-
1100
600
180
-
-
-
V
Ω
A
S
pF
pF
pF
Condition
V
GS
=0V, I
D
=250uA
V
DS
=30V, V
GS
=0V
V
GS
=20V, V
DS
=0V
V
GS
=-20V, V
DS
=0V
Min
30
-
-
-
Typ
-
-
-
-
Max Unit
-
V
10
uA
100 nA
-100 nA
R
DS
(on) Static Drain-Source On-Resistance
I
DS
(on)
g
FS
On-State Drain Current
Forward Transconductance
•
Dynamic Characteristic
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
V
DS
=15V, V
GS
=0V
f=1.0Mhz
HSMC Product Specification
HSMC [ HI-SINCERITY MOCROELECTRONICS ]
