Switching Specifications
Test conditions that are not specified can be anywhere within the recommended operating range.
All typical specifications are at T
A
= +25°C, V
DD1
= V
DD2
= +5 V.
Parameter
Propagation Delay Time to Logic
Low Output
[3]
Propagation Delay Time to Logic
High Output
[3]
Pulse Width
Maximum Data Rate
Pulse Width Distortion
[4]
|t
PHL
- t
PLH
|
Propagation Delay Skew
[5]
Output Rise Time (10% – 90%)
Output Fall Time (90% - 10%)
Common Mode Transient Immunity
at Logic High Output
[6]
Common Mode Transient Immunity
at Logic Low Output
[6]
|PWD|
t
PSK
t
R
t
F
|CM
H
|
|CM
L
|
10
10
8
6
15
15
Symbol
t
PHL
t
PLH
PW
20
50
1
2
16
Min.
Typ.
16
16
Max.
22
22
Units
ns
ns
ns
MBd
ns
ns
ns
ns
kV/µs
kV/µs
Test Conditions
C
L
= 15 pF CMOS Signal Levels
C
L
= 15 pF CMOS Signal Levels
C
L
= 15 pF CMOS Signal Levels
C
L
= 15 pF CMOS Signal Levels
C
L
= 15 pF CMOS Signal Levels
C
L
= 15 pF CMOS Signal Levels
C
L
= 15 pF CMOS Signal Levels
C
L
= 15 pF CMOS Signal Levels
V
CM
= 1000 V
,
T
A
= 25°C,
V
I
= V
DD1,
V
O
> 0.8 V
DD2
V
CM
= 1000 V
,
T
A
= 25°C,
V
I
= 0 V
,
V
O
<
0.8 V
8
HP [ AGILENT(HEWLETT-PACKARD) ]
