ATF-501P8 Electrical Specifications
T
A
= 25°C, DC bias for RF parameters is Vds = 4.5V and Ids = 280 mA unless otherwise specified.
Symbol
Vgs
Vth
Idss
Gm
Parameter and Test Condition
Operational Gate Voltage
Threshold Voltage
Saturated Drain Current
Transconductance
Vds = 4.5V, Ids = 280 mA
Vds = 4.5V, Ids = 32 mA
Vds = 4.5V, Vgs = 0V
Vds = 4.5V, Gm =
∆Ids/∆Vgs;
∆Vgs
= Vgs1 – Vgs2
Vgs1 = 0.55V, Vgs2 = 0.5V
Vds = 0V, Vgs = -4.5V
f = 2 GHz
f = 900 MHz
f = 2 GHz
f = 900 MHz
f = 2 GHz
f = 900 MHz
f = 2 GHz
f = 900 MHz
f = 2 GHz
f = 900 MHz
Offset BW = 5 MHz
Offset BW = 10 MHz
Units
V
V
µA
mmho
Min.
0.42
—
—
—
Typ.
0.55
0.33
5
1872
Max.
0.67
—
—
—
Igss
NF
G
OIP3
P1dB
PAE
ACLR
Gate Leakage Current
Noise Figure
[1]
Gain
[1]
Output 3
rd
Order Intercept Point
[1,2]
Output 1dB Compressed
[1]
Power Added Efficiency
[1]
Adjacent Channel Leakage
Power Ratio
[1,3]
µA
dB
dB
dB
dB
dBm
dBm
dBm
dBm
%
%
dBc
dBc
-30
—
—
13.5
—
43
—
27.5
—
50
—
—
—
-0.8
1
—
15
16.6
45.5
42
29
27.3
65
49
63.9
64.1
—
—
—
16.5
—
—
—
—
—
—
—
—
—
Notes:
1. Measurements at 2 GHz obtained using production test board described in Figure 2 while measurement at 0.9GHz obtained from load pull tuner.
2. i ) 2 GHz OIP3 test condition: F1 = 2.0 GHz, F2 = 2.01 GHz and Pin = -5 dBm per tone.
ii ) 900 MHz OIP3 test condition: F1 = 900 MHz, F2 = 910 MHz and Pin = -5dBm per tone.
3. ACLR test spec is based on 3GPP TS 25.141 V5.3.1 (2002-06)
- Test Model 1
- Active Channels: PCCPCH + SCH + CPICH + PICH + SCCPCH + 64 DPCH (SF=128)
- Freq = 2140 MHz
- Pin = -5 dBm
- Channel Integrate Bandwidth = 3.84 MHz
4. Use proper bias, board, heatsinking and derating designs to ensure max channel temperature is not exceeded.
See absolute max ratings and application note for more details.
Input
50 Ohm
Transmission
Line and
Drain Bias T
(0.3 dB loss)
Input
Matching
Circuit
Γ_mag=0.79
Γ_ang=-164°
(1.1 dB loss)
DUT
Output
Matching
Circuit
Γ_mag=0.69
Γ_ang=-163°
(0.9 dB loss)
50 Ohm
Transmission
Line and
Drain Bias T
(0.3 dB loss)
Output
Figure 6. Block diagram of the 2 GHz production test board used for NF, Gain, OIP3 , P1dB and PAE measurements at 2 GHz. This circuit achieves a
trade-off between optimal OIP3, P1dB and VSWR. Circuit losses have been de-embedded from actual measurements.
3
HP [ AGILENT(HEWLETT-PACKARD) ]
