RFM70 V1.0
4 State Control
4.1 State Control Diagram
Pin signal: VDD, CE
RFM70 has built-in state machines that
control the state transition between different
modes.
SPI register: PWR_UP, PRIM_RX,
EN_AA, NO_ACK, ARC, ARD
System information: Time out, ACK
received, ARD elapsed, ARC_CNT, TX
FIFO empty, ACK packet transmitted,
Packet received
When auto acknowledge feature is disabled,
state transition will be fully controlled by
MCU.
VDD>=1.9
V
Power Down
PWR_UP=1
PWR_UP=0
Standby-I
CE=1
ARD elapsed and ARC_CNT<ARC
Time out or ACK received
CE=0
CE=0
TX FIFO empty
TX
RX
TX FIFO
Data Ready
Standby-II
EN_AA=1
NO_ACK=0
Figure 3 PTX (PRIM_RX=0) state control diagram
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