RF42/43
7. Auxiliary Functions
7.1. Smart Reset
The RF42/43 contains an enhanced integrated SMART RESET or POR circuit. The POR circuit contains both a
classic level threshold reset as well as a slope detector POR. This reset circuit was designed to produce reliable
reset signal in any circumstances. Reset will be initiated if any of the following conditions occur:
■ Initial power on, when VDD starts from 0V: reset is active till VDD reaches VRR (see table);
■ When VDD decreases below VLD for any reason: reset is active till VDD reaches VRR again;
■ A software reset via ―Register 08h. Operating Mode and Function Control 2,‖: reset is active for time
TSWRST
■ On the rising edge of a VDD glitch when the supply voltage exceeds the following time functioned limit:
The reset will initialize all registers to their default values. The reset signal is also available for output and use by
the microcontroller by using the default setting for GPIO_0. The inverted reset signal is available by default on
GPIO_1.
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