RF42/43
Register 7Dh. TX FIFO Control 2
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Reserved
R/W
txfaethr[5:0]
Name
Type
R/W
Reset value = 00000100
Bit
Name
Function
Reserved
txfaethr[5:0]
7：6
5：0
Reserved.
TX FIFO Almost Empty Threshold.
Register 7Fh. FIFO Access
Bit
D7
D6
D5
D4
fifod[7:0]
R/W
D3
D2
D1
D0
Name
Type
Reset value = NA
Bit
Name
Function
FIFO Data.
A Write (R/W = 1) to this Address will begin a Burst Write to the TX FIFO. The
FIFO will be loaded in the same manner as a Burst SPI Write but the SPI address
will not be incremented. To conclude the TX FIFO Write the SEL pin should be
brought HIGH, in the same manner.
fifod[7:0]
7：0
107
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