RF42/43
Register 7Bh. Turn Around and 15.4 Length Compliance
Bit
D7
15.4 Length
R/W
D6
D5
D4
D3
D2
turn_around_en
R/W
D1
D0
phase[1:0]
R/W
Reserved[6:3]
R/W
Name
Type
Reset value = 01111011
Bit
Name
Function
15.4 Packet Length Compliance.
If set, then PK Length definition for both TX and RX will also include the CRC bytes,
If reset, then the Length refers ONLY to the DATA payload. For example, writing ―9‖
to this register when it is set, means we are sending/expecting ―7‖ bytes of DATA,
and the other ―2‖ should be the CRC (CRC should be enabled separately).
Reserved.
7
15.4 Length
Reserved[6:3]
6:3
2
Turn Around Enable.
turn_around_en
Enabling for the turn around functionality.
Turn Around Phase.
The RX to TX and vice-versa change in frequency will happen (if bit [2] is set) at the
last byte, and these two registers set the bit position in which the frequency shifts
should occur. Make sure it does not happen to early otherwise the last bits will be
missed.
phase[1:0]
1:0
Register 7Ch. TX FIFO Control 1
Bit
D7
D6
D5
D4
D3
D2
txafthr[5:0]
R/W
D1
D0
Reserved
R/W
Name
Type
Reset value = 00110111
Bit
Name
Function
Reserved
txafthr[5:0]
7：6
5：0
Reserved.
TX FIFO Almost Full Threshold.
106
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