RF31
Table 5. Digital IO Specifications (SDO, SDI, SCLK, nSEL, and nIRQ)
Parameter
Symb
ol
Conditions
Min
Typ
Max Units
Rise Time
TRISE
0.1 x VDD to 0.9 x VDD, CL= 5 pF
0.9 x VDD to 0.1 x VDD, CL= 5 pF
—
—
8
ns
Fall Time
TFALL
CIN
—
—
—
—
8
1
ns
Input Capacitance
pF
Logic High Level Input Voltage
Logic Low Level Input Voltage
VIH
VIL
VDD – 0.6
—
—
—
V
V
0.6
Input Current
IIN
0<VIN< VDD
–100
—
—
100
nA
V
Logic High Level Output Voltage
VOH
IOH<1 mA source, VDD=1.8 V
VDD – 0.6
—
Logic Low Level Output Voltage
VOL
IOL<1 mA sink, VDD=1.8 V
—
—
0.6
V
Note: All specification guaranteed by production test unless otherwise noted.
Table 6. GPIO Specifications (GPIO_0, GPIO_1, and GPIO_2)
Parameter
Symbol
Conditions
Min
Typ
Max Units
0.1 x VDD to 0.9 x VDD,
CL= 10 pF, DRV<1:0>=HH
Rise Time
Fall Time
TRISE
—
—
8
ns
ns
0.9 x VDD to 0.1 x VDD,
CL= 10 pF, DRV<1:0>=HH
TFALL
—
—
8
1
Input Capacitance
CIN
VIH
—
VDD – 0.6
—
—
—
pF
V
Logic High Level Input Voltage
Logic Low Level Input Voltage
Input Current
VIL
—
0.6
100
25
V
IIN
0<VIN< VDD
VIL=0 V
–100
5
—
nA
μA
mA
mA
mA
mA
Input Current If Pullup is Activated
Maximum Output Current
IINP
—
IOmaxLL
IOmaxLH
IOmaxHL
IOmaxHH
DRV<1:0>=LL
DRV<1:0>=LH
DRV<1:0>=HL
DRV<1:0>=HH
0.1
0.5
2.3
3.1
3.6
0.8
3.5
4.8
5.4
0.9
1.5
1.8
IOH< IOmax source,
VDD=1.8 V
Logic High Level Output Voltage
Logic Low Level Output Voltage
VOH
VOL
VDD – 0.6
—
—
—
V
V
IOL< IOmax sink, VDD=1.8 V
—
0.6
Note: All specification guaranteed by production test unless otherwise noted.
9
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