HI-8585, HI-8586
FUNCTIONAL DESCRIPTION
Figure 1 is a block diagram of the line driver. The +5V and
-5V levels are generated internally using on-chip zeners.
Currents for slope control are set by zener voltages across
on-chip resistors.
A unity gain buffer receives the internally generated slopes
and differentially drives the ARINC line. Current is limited
by the series output resistors at each pin. There are no
fuses at the outputs of the HI-8585 as exists on the HI-
8382.
The TX0IN and TX1IN inputs receive logic signals from a
control transmitter chip such as the HI-6010, HI-3282 or
HI-8282. TXAOUT and TXBOUT hold each side of the
ARINC bus at Ground until one of the inputs becomes a
One. If for example TX1IN goes high, a charging path is
enabled to 5V on an “A” side internal capacitor while the
“B” side is enabled to -5V. The charging current is se-
lected by the SLP1.5 pin. If the SLP1.5 pin is high, the
capacitor is nominally charged from 10% to 90% in 1.5µs.
If SLP1.5 is low, the rise and fall times are 10µs.
The HI-8585 has 37.5 ohms in series with each output and
the HI-8586 has 2 ohms in series with each output. The
HI-8586 is for applications where external series resis-
tance is required, typically for lightning protection devices.
Both the HI-8585 and HI-8586 are built using high-speed
CMOS technology. Care should be taken to ensure the
V+ and V- supplies are locally decoupled and that the
input waveforms are free from negative voltage spikes
which may upset the chip’s internal slope control circuitry.
5V
“A” SIDE
ONE
TXAOUT
CURRENT
CONTROL
HI-8585 = 37.5 OHMS
HI-8586 = 2 OHMS
NULL
ZERO
-5V
CONTROL
LOGIC
TX0IN
TX1IN
ESD
PROTECTION
AND
SLP1.5
VOLTAGE
TRANSLATION
5V
“B” SIDE
ONE
NULL
ZERO
TXBOUT
CURRENT
CONTROL
HI-8585 = 37.5 OHMS
HI-8586 = 2 OHMS
-5V
CONTROL
LOGIC
FIGURE 1 - LINE DRIVER BLOCK DIAGRAM
5V
1
VCC
2
6
7
HARDWIRED
OR
DRIVEN FROM LOGIC
TESTA
TESTB
ROUTA
ROUTB
RXD1
RXD0
8
{
HI-8588
4
3
RINA
ARINC
Channel
HI-6010
APPLICATION INFORMATION
RINB
Figure 2 shows a possible application
of the HI-8585/86 interfacing an ARINC
transmit channel from the HI-6010.
5
15V
8 BIT BUS
1
SLP1.5
8
V+
6
7
3
2
TXAOUT
TXD1
TXD0
TX1IN
TX0IN
ARINC
Channel
HI-8585
TXBOUT
GND
V-
4
5
-15V
FIGURE 2 - APPLICATION DIAGRAM
HOLT INTEGRATED CIRCUITS
2
HOLTIC [ HOLT INTEGRATED CIRCUITS ]
