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HI-8581CJI 参数 Datasheet PDF下载

HI-8581CJI图片预览
型号: HI-8581CJI
PDF下载: 下载PDF文件 查看货源
内容描述: ARINC- 429线路驱动器和双接收机 [ARINC 429 LINE DRIVER AND DUAL RECEIVER]
分类和应用: 驱动器微控制器和处理器串行IO控制器通信控制器外围集成电路接收机数据传输时钟
文件页数/大小: 15 页 / 481 K
品牌: HOLTIC [ HOLT INTEGRATED CIRCUITS ]
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HI-8581  
LINE DRIVER OPERATION  
REPEATER OPERATION  
The line driver in the HI-8581 is designed to directly drive the ARINC  
429 bus. The two ARINC outputs (TXA(OUT) and TXB(OUT))  
provide a differential voltage to produce a +10 volt One, a -10 volt  
Zero, and a 0 volt Null. Setting Control Register bit 13 to zero  
causes a slope of 1.5 ms on the ARINC outputs; a one in Control  
Register bit 13 causes a slope of 10 ms. Timing is set by on-chip  
resistor and capacitor and tested to be within ARINC requirements.  
No additional hardware is required to control the slope. The HI-8581  
has 37.5 ohms in series with each line driver output.  
Repeater mode of operation allows a data word that has been  
received by the HI-8581 to be placed directly into its FIFO for  
transmission. Repeater operation is similar to normal receiver  
operation. In normal operation, either byte of a received data  
word may be read from the receiver latches first by use of SEL  
input. During repeater operation however, the lower byte of the  
data word must be read first. This is necessary because, as the  
data is being read, it is also being loaded into the FIFO and the  
transmitter FIFO is always loaded with the lower byte of the data  
word first. Signal flow for repeater operation is shown in the  
Timing Diagrams section.  
TXA(OUT)  
ARINC BIT  
TXB(OUT)  
DATA  
BIT 30  
NULL  
DATA  
DATA  
NULL  
NULL  
BIT 31  
BIT 1  
NEXT WORD  
WORD GAP  
BIT 32  
DATA BUS  
CWSTR  
VALID  
tCWSET  
tCWHLD  
tCWSTR  
tEND/R  
tEN  
tD/R  
tSELEN  
tSELEN  
tENSEL  
tENSEL  
tENEN  
tDATAEN  
tD/REN  
tDATAEN  
DATA BUS  
tENDATA  
tENDATA  
HOLT INTEGRATED CIRCUITS  
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