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HI-3210PQI 参数 Datasheet PDF下载

HI-3210PQI图片预览
型号: HI-3210PQI
PDF下载: 下载PDF文件 查看货源
内容描述: ARINC 429数据管理引擎/八通道接收器/发射器四 [ARINC 429 DATA MANAGEMENT ENGINE / Octal Receiver / Quad Transmitter]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路
文件页数/大小: 42 页 / 159 K
品牌: HOLTIC [ HOLT INTEGRATED CIRCUITS ]
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HI-3210  
ARINC 429 Transmit Scheduler  
Each of the four ARINC 429 transmit channels has its  
own transmit controller. The controller is user-  
programmed to output ARINC labels in a predefined  
order and repetition rate. A sequence of up to 256 ARINC  
labels may be transmitted before repeating the sequence.  
The user is responsible for construction of the descriptor  
table and for setting the Repetition Rate prior to asserting  
RUN/STOP. Facilities exist for immediate cycle repetition  
and for single-cycle operation.  
The byte content of each ARINC 429 message  
transmitted is user defined by the descriptor contents.  
Data bytes may be sourced from the host CPU / auto-  
initialization EEPROM (immediate data) or from the  
ARINC 429 receive memory (ARINC indexed). This  
allows received ARINC data to be re-transmitted on  
another bus with or without filtering, label byte re-  
assignment or data modification. It also allows data from  
multiple ARINC 429 receive buses to be re-packetized  
into new ARINC 429 transmitted messages.  
A descriptor table with up to 256 entries (descriptors) is  
compiled by the user to define the sequence of ARINC  
429 messages transmitted on each channel. When the  
RUN/STOP bit in the ARINC TX Control Register is  
asserted, the controller compiles the first 32-bit ARINC  
word from the instructions given by the first descriptor  
and then transmits it. A Transmit Sequence Pointer then  
increments to the next descriptor in the table and the  
process is repeated for Descriptor number 2.  
ARINC 429 messages continue to be compiled and  
transmitted until the last descriptor in the table. The end  
of the table is marked by a special descriptor if not all 256  
entries are needed. The Sequence Pointer is then reset  
to zero.  
Conditional transmission control allows sequenced words  
to be skipped if no new data is available.  
Each ARINC 429 transmit channel is independently  
configured with its own ARINC 429 TX Control Register,  
ATXCR0-3, as previously described.  
A Repetition Rate Counter is used to time the start of the  
next transmission cycle.  
ARINC 429 Transmit Descriptor table  
0x47FF  
Repetion Rate  
Register  
Sequence 255 Descriptor Frame  
Sequence 254 Descriptor Frame  
0x47F8  
0x47F0  
Repetition rate  
counter  
Value Byte 4  
Action Byte 4  
Value Byte 3  
Action Byte 3  
Value Byte 2  
Action Byte 2  
Value Byte 1  
Action Byte 1  
Sequence 5 Descriptor Frame  
Sequence 4 Descriptor Frame  
Sequence 3 Descriptor Frame  
Sequence 2 Descriptor Frame  
Sequence 1 Descriptor Frame  
0x4028  
0x4020  
0x4018  
0x4010  
(Memory Addresses shown  
for ARINC Tx channel 0)  
0x4008  
0x4000  
Sequence 0 Descriptor Frame  
Sequence  
pointer  
0 0 0  
The value of each ARINC 429 label transmitted in the  
sequence is defined by its eight-byte descriptor. The  
descriptor consists of one “Action byte” and one “Value”  
byte for each of the four bytes that make up the ARINC  
429 transmitted label.  
values, or values from specific locations within the ARINC  
429 receive memory. Action byte 1 also has one  
additional op-code to facilitate sequence flow control.  
The construction ofAction and Value bytes are described in  
the next section.  
The four pairs of Action and Value bytes describe where  
the data for each byte may be found. Different op-codes  
allow the data source to be host CPU populated fixed  
HOLT INTEGRATED CIRCUITS  
21  
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