HI-1579, HI-1581
REVISION HISTORY
Document Rev. Date
DS1579
F
G
07/24/09
10/5/09
Description of Change
Correct typographical errors in package dimensions. Clarified available temperature
ranges.
Clarified status of RXA/B and RXA/B pins in bus idle state when RXENA or RXENB are
high (logic “1”).
Clarified nomenclature of chip-scale package as QFN. Added ’M’ flow option for QFN
package (’PCM’ package option).
Updated datasheet to include HI-1581 variant.
Corrected dynamic current and power dissipation values.
Revised Thermal Characteristic table to correspond to correct dynamic currents and
power dissipation values.
Revised DC Electrical Characteristics table to correspond to actual measured values.
Revised Bus Connection and Test Circuit Diagrams. Revised SOIC package standoff
dimension.
Revised text in functional description to improve clarity. Added more detail to AC timing
parameter table. Removed reference to non-preferred transformers Updated package
drawings.
Correct typos in Figure references on pages 4 & 5. Update reflow solder temperature.
Correct mistake in Figure 2. Update package drawings.
Corrected Figures 2 and 3. Added notes for Receiver Gap Time in AC Characteristics.
Other minor clarifications.
Update Pin Descriptions for QFN package. Add Tape and Reel option for plastic
packages.
Update “DC Electrical Characteristics” table: change VIH to 2.0V min.
H
I
J
01/26/10
02/01/10
08/18/10
K
05/23/13
L
M
N
O
05/14/14
04/09/15
01/13/16
07/29/16
HOLT INTEGRATED CIRCUITS
9
HOLTIC [ HOLT INTEGRATED CIRCUITS ]
