HT48R063/064/065/066/0662/067
System Control Registers - CTRL0, CTRL1, CTRL2
These registers are used to provide control over various internal functions. Some of these include the PFD control,
PWM control, certain system clock options, the LXT Oscillator low power control, external Interrupt edge trigger type,
Watchdog Timer enable function, Time Base function division ratio, and the LXT oscillator enable control.
·
CTRL0 Register
¨
HT48R063/HT48R064/HT48R065
Bit
Name
R/W
7
6
5
4
3
PFDEN1
R/W
2
PFDEN0
R/W
1
LXTLP
R/W
0
0
CLKMOD
R/W
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
POR
0
0
0
¨
HT48R066
Bit
Name
R/W
7
6
PFDCS
R/W
0
5
4
3
PFDEN1
R/W
2
PFDEN0
R/W
1
LXTLP
R/W
0
0
CLKMOD
R/W
¾
¾
¾
¾
¾
¾
¾
¾
¾
POR
0
0
0
Bit 7, 5, 4
Bit 6
Unimplemented, read as ²0²
PFDCS: PFD clock source
0: timer0
1: timer1
Bit 3,2
PFDEN1, PFDEN0: PFD/PFD enable/disable
00: both disables
01: Reserved
10: PFD enable
11: PFD and PFD both enabled
when PFD or PFD is disabled, the related pin will have a normal I/O function.
Bit 1
Bit 0
LXTLP: LXT oscillator low power control function
0: LXT Oscillator quick start-up mode
1: LXT Oscillator Low Power Mode
CLKMOD: system clock mode selection.
0: High speed - HIRC used as system clock
1: Low speed - LXT used as system clock, HIRC oscillator stopped.
For HT48R063/064/065/066, these selections are only valid if the oscillator configuration options
have selected the HIRC+LXT.
Rev. 1.10
22
June 9, 2009
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
