HT48R063B/064B/065B/066B
Timer/Event Counters
The provision of timers form an important part of any
microcontroller, giving the designer a means of carrying
out time related functions. The devices contain from one
to three count-up timer of 8-bit capacity. As the timers
have three different operating modes, they can be con-
figured to operate as a general timer, an external event
counter or as a pulse width capture device. The provi-
sion of an internal prescaler to the clock circuitry on
gives added range to the timers.
value loaded by the preload register to the full count of
FFH at which point the timer overflows and an internal
interrupt signal is generated. The timer value will then
be reset with the initial preload register value and con-
tinue counting.
Note that to achieve a maximum full range count of FFH,
the preload register must first be cleared to all zeros. It
should be noted that after power-on, the preload regis-
ters will be in an unknown condition. Note that if the
Timer/Event Counter is in an OFF condition and data is
written to its preload register, this data will be immedi-
ately written into the actual counter. However, if the
counter is enabled and counting, any new data written
into the preload data register during this period will re-
main in the preload register and will only be written into
the actual counter the next time an overflow occurs.
There are two types of registers related to the
Timer/Event Counters. The first is the register that con-
tains the actual value of the timer and into which an ini-
tial value can be preloaded. Reading from this register
retrieves the contents of the Timer/Event Counter. The
second type of associated register is the Timer Control
Register which defines the timer options and deter-
mines how the timer is to be used. The device can have
the timer clock configured to come from the internal
clock source. In addition, the timer clock source can also
be configured to come from an external timer pin.
Timer Control Registers - TMR0C, TMR1C
The flexible features of the Holtek microcontroller
Timer/Event Counters enable them to operate in three
different modes, the options of which are determined by
the contents of their respective control register.
Configuring the Timer/Event Counter Input Clock
Source
The Timer Control Register is known as TMRnC. It is the
Timer Control Register together with its corresponding
timer register that control the full operation of the
Timer/Event Counter. Before the timer can be used, it is
essential that the Timer Control Register is fully pro-
grammed with the right data to ensure its correct opera-
tion, a process that is normally carried out during
program initialisation.
The Timer/Event Counter clock source can originate
from various sources, an internal clock or an external
pin. The internal clock source source is used when the
timer is in the timer mode or in the pulse width capture
mode. For some Timer/Event Counters, this internal
clock source is first divided by a prescaler, the division
ratio of which is conditioned by the Timer Control Regis-
ter bits T0PSC0~T0PSC2. For Timer/Event Counter 0,
the internal clock source can be either fSYS or the LXT
Oscillator, the choice of which is determined by the T0S
bit in the TMR0C register.
To choose which of the three modes the timer is to oper-
ate in, either in the timer mode, the event counting mode
or the pulse width capture mode, bits 7 and 6 of the
Timer Control Register, which are known as the bit pair
TnM1/TnM0, must be set to the required logic levels.
The timer-on bit, which is bit 4 of the Timer Control Reg-
ister and known as TnON, provides the basic on/off con-
trol of the respective timer. Setting the bit high allows the
counter to run, clearing the bit stops the counter. Bits
0~2 of the Timer Control Register determine the division
ratio of the input clock prescaler. The prescaler bit set-
tings have no effect if an external clock source is used. If
the timer is in the event count or pulse width capture
mode, the active transition edge level type is selected by
the logic level of bit 3 of the Timer Control Register
which is known as TnEG. The TnS bit selects the inter-
nal clock source if used.
An external clock source is used when the timer is in the
event counting mode, the clock source being provided
on an external timer pin TCn. Depending upon the con-
dition of the TnEG bit, each high to low, or low to high
transition on the external timer pin will increment the
counter by one.
Timer Registers - TMR0, TMR1
The timer registers are special function registers located
in the Special Purpose Data Memory and is the place
where the actual timer value is stored. These registers
are known as TMR0 and TMR1. The value in the timer
registers increases by one each time an internal clock
pulse is received or an external transition occurs on the
external timer pin. The timer will count from the initial
Rev. 1.00
37
April 7, 2011
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
