HT46R064B/065B/066B
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RES Pin Reset
This type of reset occurs when the microcontroller is
already running and the RES pin is forcefully pulled
low by external hardware such as an external switch.
In this case as in the case of other reset, the Program
Counter will reset to zero and program execution initi-
ated from this point.
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WDT Time-out Reset during Idle/Sleep
Timing Chart
Note: The tSST 2 clock cycles via configuration option
if the system clock source is provided by ERC or
HIRC. The SST is 128 for HXT or LXT.
0
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Reset Initial Conditions
Note: tRSTD is power-on delay, typical time=50ms
The different types of reset described affect the reset
flags in different ways. These flags, known as PDF and
TO are located in the status register and are controlled
by various microcontroller operations, such as the
Idle/Sleep function or Watchdog Timer. The reset flags
are shown in the table:
RES Reset Timing Chart
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Low Voltage Reset - LVR
The microcontroller contains a low voltage reset cir-
cuit in order to monitor the supply voltage of the de-
vice. The LVR function is selected via a configuration
option. If the supply voltage of the device drops to
within a range of 0.9V~VLVR such as might occur when
changing the battery, the LVR will automatically reset
the device internally. For a valid LVR signal, a low sup-
ply voltage, i.e., a voltage in the range between
0.9V~VLVR must exist for a time greater than that spec-
ified by tLVR in the A.C. characteristics. If the low sup-
ply voltage state does not exceed this value, the LVR
will ignore the low supply voltage and will not perform
a reset function. The actual VLVR value can be se-
lected via configuration options.
TO PDF
RESET Conditions
Power-on reset
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RES or LVR reset during Normal or Slow
Mode operation
WDT time-out reset during Normal or Slow
Mode operation
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WDT time-out reset during Idle or Sleep
Mode operation
Note: ²u² stands for unchanged
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The following table indicates the way in which the vari-
ous components of the microcontroller are affected after
a power-on reset occurs.
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Note: tRSTD is power-on delay, typical time=50ms
Item
Condition After RESET
Low Voltage Reset Timing Chart
Program Counter Reset to zero
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Watchdog Time-out Reset during Normal Operation
The Watchdog time-out Reset during normal opera-
tion is the same as a hardware RES pin reset except
that the Watchdog time-out flag TO will be set to ²1².
Interrupts
WDT
All interrupts will be disabled
Clear after reset, WDT begins
counting
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Timer/Event
Counter
Timer Counter will be turned off
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The Timer Counter Prescaler will
be cleared
Prescaler
Note: tRSTD is power-on delay, typical time=50ms
Input/Output Ports I/O ports will be setup as inputs
WDT Time-out Reset during Normal Operation
Timing Chart
Stack Pointer will point to the top
Stack Pointer
of the stack
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Watchdog Time-out Reset during Idle/Sleep mode
The Watchdog time-out Reset during Idle/Sleep mode
is a little different from other kinds of reset. Most of the
conditions remain unchanged except that the Pro-
gram Counter and the Stack Pointer will be cleared to
²0² and the TO flag will be set to ²1². Refer to the A.C.
Characteristics for tSST details.
Rev. 1.00
33
April 8, 2011
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
