HT46RU66/HT46CU66
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microcontroller manages program control by loading the
required address into the Program Counter. For condi-
tional skip instructions, once the condition has been
met, the next instruction, which has already been
fetched during the present instruction execution, is dis-
carded and a dummy cycle takes its place while the cor-
rect instruction is obtained.
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(
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8 1 9 2 2 B a n k )
The lower byte of the Program Counter, known as the
Program Counter Low register or PCL, is available for
program control and is a readable and writable register.
By transferring data directly into this register, a short pro-
gram jump can be executed directly, however, as only
this low byte is available for manipulation, the jumps are
limited to the present page of memory, that is 256 loca-
tions. When such program jumps are executed it should
also be noted that a dummy cycle will be inserted.
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Program Memory
As the Program Memory is stored in two Banks, the Bank
selection is under the control of bit 5 of the Bank Pointer.
It is this Bank Pointer bit that controls the highest address
bit of the Program Counter as shown in the diagram.
·
·
Location 004H
Location 004H is reserved for the external interrupt
service program. If the INT0 input pin is activated, the
interrupt is enabled, and the stack is not full, the pro-
gram begins execution at location 004H.
Program Memory
The program memory is used to store the program in-
structions, which are to be executed. It also contains
data, table, and interrupt entries, and is organized into a
format of 16384´16 bits, which are addressed by the PC
and table pointer. The Program Memory is divided into
two banks, Bank0 and Bank1. Each bank has a capacity
of 8192´16 bits and is selected using bit BP.5 in the the
bank pointer register. With BP = 000XXXXXB, Bank0 is se-
lected and with BP = 001XXXXXB, Bank1 is selected. The
JMP and CALL instructions provide only 13 bits of ad-
dress to allow branching within any 8K program memory
bank. When executing a JMP or CALL instruction, the
user must ensure that the bank pointer bit, BP.5, is pro-
grammed so that the desired program memory bank is
addressed. If a return from a CALL instruction or inter-
rupt is executed, the entire 14 bit PC is popped off the
stack. Therefore, manipulation of the BP.5 is not re-
quired when the RET or RETI instructions are executed.
Location 008H
Location 008H is also reserved for the external inter-
rupt service program. If the INT1 input pin is activated,
the interrupt is enabled, and the stack is not full, the
program will jump to this location and begin execution.
·
·
·
Location 00CH
Location 00CH is reserved for the Timer/Event Coun-
ter 0 interrupt service program. If a timer interrupt re-
sults from a Timer/Event Counter 0 overflow, and if the
interrupt is enabled and the stack is not full, the pro-
gram will jump to this location and begin execution.
Location 010H
Location 010H is reserved for the Timer/Event Coun-
ter 1 interrupt service program. If a timer interrupt re-
sults from a Timer/Event Counter 1 overflow, and if the
interrupt is enabled and the stack is not full, the pro-
gram will jump to this location and begin execution.
Location 014H
Certain locations in the Program Memory are reserved
for special usage:
Location 014H is reserved for the UART Bus interrupt
service program. If the UART Bus interrupt resulting
from a transmission flag or reception is completed, and
if the interrupt is enabled and the stack is not full, the
program will jump to this location and begin execution.
·
Location 000H
Location 000H is reserved for program initialisation.
After a device reset, the program will jump to this loca-
tion and begin execution.
Table Location
Instruction(s)
**13~*8
TBHP
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
TABRDL [m]
@7
@7
@6
@6
@5
@5
@4
@4
@3
@3
@2
@2
@1
@1
@0
@0
111111
Table Location
TBHP: Table pointer higher-order bits
Note: *13~*0: Table location bits
@7~@0: Table pointer lower-order bits (TBLP)
Rev. 1.20
9
October 2, 2007
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
