HT46RU66/HT46CU66
Test Conditions
Conditions
Symbol
Parameter
Standby Current
Min.
Typ.
Max.
Unit
VDD
3V
1
2
5
¾
¾
¾
¾
¾
mA
mA
mA
No load, system HALT,
ISTB1
(*fS=T1)
LCD Off at HALT, UART Off
5V
No load, system HALT,
LCD On at HALT, C type,
UART Off
3V
2.5
Standby Current
(*fS=RTC OSC)
ISTB2
5V
3V
5V
10
2
20
5
¾
¾
¾
mA
mA
mA
No load, system HALT,
LCD On at HALT, C type,
UART Off
Standby Current
(*fS=WDT OSC)
ISTB3
6
10
No load, system HALT,
LCD On at HALT, R type,
17
34
13
28
14
26
10
19
30
60
25
50
25
50
20
¾
¾
¾
¾
¾
¾
¾
¾
mA
mA
mA
mA
mA
mA
mA
mA
3V
5V
Standby Current
(*fS=RTC OSC)
ISTB4
ISTB5
ISTB6
ISTB7
1/2 bias, VLCD=VDD
UART Off
,
(Low bias current option)
No load, system HALT,
LCD On at HALT, R type,
3V
5V
Standby Current
(*fS=RTC OSC)
1/3 bias, VLCD=VDD
UART Off
,
(Low bias current option)
No load, system HALT,
LCD On at HALT, R type,
3V
5V
Standby Current
(*fS=WDT OSC)
1/2 bias, VLCD=VDD
`UART Off
,
(Low bias current option)
No load, system HALT,
LCD On at HALT, R type,
3V
5V
Standby Current
(*fS=WDT OSC)
1/3 bias, VLCD=VDD
UART Off
,
40
(Low bias current option)
Input Low Voltage for I/O Ports,
TMR0, TMR1, INT0 and INT1
VIL1
0.3VDD
VDD
0
V
V
¾
¾
¾
¾
¾
Input High Voltage for I/O Ports,
TMR0, TMR1, INT0 and INT1
VIH1
0.7VDD
¾
VIL2
0.4VDD
VDD
Input Low Voltage (RES)
Input High Voltage (RES)
Low Voltage Reset Voltage
Low Voltage Detector Voltage
0
0.9VDD
2.7
3.0
0
V
V
¾
¾
¾
¾
¾
¾
¾
VIH2
VLVR
VLVD
¾
¾
3.0
3.3
¾
3.3
V
3.6
V
¾
AVDD
VREF
AVDD
AVDD
52QFP, 56SSOP
100QFP
AVDD=3V
AVDD=5V
V
VAD
VREF
IOL1
IOH1
IOL2
IOH2
A/D Input Voltage
¾
¾
0
V
¾
1.3
1.5
6
V
¾
ADC Input Reference Voltage
Range
V
¾
3V
5V
3V
5V
3V
5V
3V
5V
12
mA
mA
mA
mA
mA
mA
mA
mA
¾
¾
¾
¾
¾
¾
¾
¾
I/O Port Segment Logic Output
Sink Current
VOL=0.1VDD
VOH=0.9VDD
VOL=0.1VDD
VOH=0.9VDD
10
25
-2
-4
I/O Port Segment Logic Output
Source Current
-5
-8
210
350
-80
-180
420
700
-160
-360
LCD Common and Segment
Current
LCD Common and Segment
Current
Rev. 1.20
6
October 2, 2007
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
