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HT46R47(18SOP) 参数 Datasheet PDF下载

HT46R47(18SOP)图片预览
型号: HT46R47(18SOP)
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 8-Bit, UVPROM, 8MHz, CMOS, PDSO18]
分类和应用: 可编程只读存储器微控制器光电二极管
文件页数/大小: 75 页 / 613 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT46R46/C46/R47/C47/R48/R49  
Power Down Mode and Wake-up  
Power Down Mode  
inputs. Also note that additional standby current will also  
be required if the configuration options have enabled the  
Watchdog Timer internal oscillator.  
All of the Holtek microcontrollers have the ability to enter  
a Power Down Mode, also known as the HALT Mode or  
Sleep Mode. When the device enters this mode, the nor-  
mal operating current, will be reduced to an extremely  
low standby current level. This occurs because when  
the device enters the Power Down Mode, the system  
oscillator is stopped which reduces the power consump-  
tion to extremely low levels, however, as the device  
maintains its present internal condition, it can be woken  
up at a later stage and continue running, without requir-  
ing a full reset. This feature is extremely important in ap-  
plication areas where the MCU must have its power  
supply constantly maintained to keep the device in a  
known condition but where the power supply capacity is  
limited such as in battery applications.  
Wake-up  
After the system enters the Power Down Mode, it can be  
woken up from one of various sources listed as follows:  
·
An external reset  
·
An external falling edge on Port A  
·
A system interrupt  
·
A WDT overflow  
If the system is woken up by an external reset, the de-  
vice will experience a full system reset, however, if the  
device is woken up by a WDT overflow, a Watchdog  
Timer reset will be initiated. Although both of these  
wake-up methods will initiate a reset operation, the ac-  
tual source of the wake-up can be determined by exam-  
ining the TO and PDF flags. The PDF flag is cleared by a  
system power-up or executing the clear Watchdog  
Timer instructions and is set when executing the ²HALT²  
instruction. The TO flag is set if a WDT time-out occurs,  
and causes a wake-up that only resets the Program  
Counter and Stack Pointer, the other flags remain in  
their original status.  
Entering the Power Down Mode  
There is only one way for the device to enter the Power  
Down Mode and that is to execute the ²HALT² instruc-  
tion in the application program. When this instruction is  
executed, the following will occur:  
·
The system oscillator will stop running and the appli-  
cation program will stop at the ²HALT² instruction.  
·
The Data Memory contents and registers will maintain  
Each pin on Port A can be setup via an individual config-  
uration option to permit a negative transition on the pin  
their present condition.  
·
The WDT will be cleared and resume counting if the  
to wake-up the system. When a Port A pin wake-up oc-  
curs, the program will resume execution at the instruc-  
tion following the ²HALT² instruction.  
WDT clock source is selected to come from the WDT  
oscillator. The WDT will stop if its clock source origi-  
nates from the system clock.  
·
The I/O ports will maintain their present condition.  
If the system is woken up by an interrupt, then two possi-  
ble situations may occur. The first is where the related  
interrupt is disabled or the interrupt is enabled but the  
stack is full, in which case the program will resume exe-  
cution at the instruction following the ²HALT² instruction.  
In this situation, the interrupt which woke-up the device  
will not be immediately serviced, but will rather be ser-  
viced later when the related interrupt is finally enabled or  
when a stack level becomes free. The other situation is  
where the related interrupt is enabled and the stack is  
not full, in which case the regular interrupt response  
takes place. If an interrupt request flag is set to ²1² be-  
fore entering the Power Down Mode, the wake-up func-  
tion of the related interrupt will be disabled.  
·
In the status register, the Power Down flag, PDF, will  
be set and the Watchdog time-out flag, TO, will be  
cleared.  
Standby Current Considerations  
As the main reason for entering the Power Down Mode  
is to keep the current consumption of the MCU to as low  
a value as possible, perhaps only in the order of several  
micro-amps, there are other considerations which must  
also be taken into account by the circuit designer if the  
power consumption is to be minimized. Special atten-  
tion must be made to the I/O pins on the device. All  
high-impedance input pins must be connected to either  
a fixed high or low level as any floating input pins could  
create internal oscillations and result in increased cur-  
rent consumption. This also applies to devices which  
have different package types, as there may be  
undonbed pins, which must either be setup as outputs  
or if setup as inputs must have pull-high resistors  
connected. Care must also be taken with the loads,  
which are connected to I/O pins, which are setup as out-  
puts. These should be placed in a condition in which  
minimum current is drawn or connected only to external  
circuits that do not draw current, such as other CMOS  
No matter what the source of the wake-up event is, once  
a wake-up situation occurs, a time period equal to 1024  
system clock periods will be required before normal sys-  
tem operation resumes. However, if the wake-up has  
originated due to an interrupt, the actual interrupt sub-  
routine execution will be delayed by an additional one or  
more cycles. If the wake-up results in the execution of  
the next instruction following the ²HALT² instruction, this  
will be executed immediately after the 1024 system  
clock period delay has ended.  
Rev. 1.00  
43  
April 18, 2007  
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