HT46R14A
abled until the TBLH has been backed up. All table re-
lated instructions require two cycles to complete the
operation. These areas may function as normal pro-
gram memory depending upon requirements.
I
n
d
i
r
e
c
t
A
d
d
r
e
s
s
i
n
g
R
e
g
i
s
t
e
r
0
0
0
0
0
0
0
0
0
0
0
0
1
2
3
4
5
6
7
8
9
H
H
H
H
H
H
H
H
H
H
M
P
0
I
n
d
i
r
e
c
t
A
d
d
r
e
M
s
s
i
n
g
R
e
g
i
s
t
e
r
1
P
1
Stack Register - STACK
A
C
C
P
C
L
This is a special part of the memory which is used to
save the contents of the program counter only. The
stack is organized into 8 levels and is neither part of the
data nor part of the program space, and is neither read-
able nor writeable. The activated level is indexed by the
stack pointer, SP, and is neither readable nor writeable.
At a subroutine call or interrupt acknowledge signal, the
contents of the program counter are pushed onto the
stack. At the end of a subroutine or an interrupt routine,
indicated by a return instruction, RET or RETI, the pro-
gram counter is restored to its previous value from the
stack. After a chip reset, the SP will point to the top of the
stack.
T
B
L
P
T
B
L
H
0
0
A
B
H
H
S
T
A
T
U
S
I
N
T
C
0
0
0
C
D
H
H
T
M
R
0
0
E
H
T
M
R
0
C
0
F
H
H
H
H
H
H
H
H
H
H
H
1
1
1
1
1
1
1
1
1
1
0
1
2
3
4
5
6
7
8
9
T
M
R
1
T
M
R
1
C
P
A
P
A
C
S
p
e
c
i
a
l
P
u
r
p
o
s
e
D
a
t
a
M
e
m
o
r
y
P
B
If the stack is full and a non-masked interrupt takes
place, the interrupt request flag will be recorded but the
acknowledge signal will be inhibited. When the stack
pointer is decremented, using RET or RETI, the inter-
rupt will be serviced. This feature prevents a stack over-
flow allowing the programmer to use the structure more
easily. In a similar case, if the stack is full and a ²CALL²
is subsequently executed, a stack overflow will occur
and the first entry will be lost as only the most recent 8
return addresses are stored.
P
B
C
P
C
P
C
C
1
1
A
B
H
H
M
F
I
C
1
1
C
D
H
H
C
C
M
M
P
P
0
1
C
C
1
E
H
I
N
T
C
1
1
F
H
Data Memory - RAM
2
2
2
2
2
2
2
2
2
0
1
2
3
4
5
6
7
8
H
H
H
H
H
H
H
H
H
P
P
P
P
G
G
0
1
C
C
P
P
P
P
G
G
T
T
0
1
The data memory has a capacity of 224´8 bits, and is
divided into two functional groups, namely the special
function registers and the general purpose data mem-
ory (192´8 bits), most of which are readable/writeable,
although some are read only.
A
D
R
L
A
A
D
D
R
C
H
R
The unused space before address 40H is reserved for
future expansion usage and reading these locations will
obtain a result of ²00H². The general purpose data
memory, addressed from 40H to FFH is used for data
and control information under instruction commands.
A
C
S
R
3
F
H
4
0
H
G
e
n
e
r
a
l
P
u
r
p
o
s
e
:
U
n
u
s
e
d
D
a
t
a
M
e
m
o
r
y
All of the data memory areas can handle arithmetic,
logic, increment, decrement and rotate operations di-
rectly. Except for some dedicated bits, each bit in the
data memory can be set and reset by ²SET [m].i² and
²CLR [m].i². They are also indirectly accessible through
the memory pointer registers, MP0 and MP1.
(
1
9
2
B
y
t
e
s
)
R
e
a
d
a
s
"
0
0
"
F
F
H
RAM Mapping
Rev. 1.01
8
January 21, 2009
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
