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HT46F47E 参数 Datasheet PDF下载

HT46F47E图片预览
型号: HT46F47E
PDF下载: 下载PDF文件 查看货源
内容描述: 高性价比的A / D型闪存的8位微控制器与EEPROM [Cost-Effective A/D Flash Type 8-Bit MCU with EEPROM]
分类和应用: 闪存微控制器可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 88 页 / 541 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT46F46E/HT46F47E/HT46F48E/HT46F49E  
The following timing diagram shows graphically the various stages involved in an analog to digital conversion process  
and its associated timing.  
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A/D Conversion Timing  
Programming Considerations  
The setting up and operation of the A/D converter func-  
tion is fully under the control of the application program as  
there are no configuration options associated with the  
A/D converter. After an A/D conversion process has been  
initiated by the application program, the microcontroller  
internal hardware will begin to carry out the conversion,  
during which time the program can continue with other  
functions. The time taken for the A/D conversion is de-  
pendent upon the device chosen and is a function of the  
A/D clock period tAD as shown in the table.  
When programming, special attention must be given to  
the A/D channel selection bits in the ADCR register. If  
these bits are all cleared to zero no external pins will be  
selected for use as A/D input pins allowing the pins to be  
used as normal I/O pins. When this happens the power  
supplied to the internal A/D circuitry will be reduced re-  
sulting in a reduction of supply current. This ability to re-  
duce power by turning off the internal A/D function by  
clearing the A/D channel selection bits may be an impor-  
tant consideration in battery powered applications.  
Device  
HT46F46E  
Other Devices  
A/D Conversion Time  
Another important programming consideration is that  
when the A/D channel selection bits change value the  
A/D converter must be re-initialised. This is achieved by  
pulsing the START bit in the ADCR register immediately  
after the channel selection bits have changed state. The  
exception to this is where the channel selection bits are  
all cleared, in which case the A/D converter is not re-  
quired to be re-initialised.  
64tAD  
76tAD  
A/D Conversion Time  
Rev. 1.40  
41  
July 28, 2009  
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