HT46R47E/HT46C47E
Pin Assignment
P
A
3
/
P
F
D
P
A
4
/
/
T
I
M
R
1
2
3
4
5
6
7
8
9
1
1
1
1
1
1
1
1
1
8
7
6
5
4
3
2
1
0
P
A
2
1
P
P
A
A
A
5
6
7
N
T
P
P
A
A
0
P
S
C
L
/
P
B
3
/
A
N
3
O
S
C
2
P
B
2
/
A
N
2
O
S
C
1
P
P
B
B
1
0
/
/
A
A
N
N
1
0
V
R
D
D
E
S
A
V
S
S
S
D
/
P
D
0
/
P
W
M
H
T
4
6
R
4
7
E
/
H
T
4
6
C
4
7
E
1
8
D
I
P
-
A
/
S
O
P
-
A
Pad Description
Pad Name
I/O
Options
Description
PA0~PA2
Bidirectional 8-bit input/output port. Each bit can be configured as wake-up
input by options. Software instructions determine the CMOS output or
Schmitt trigger input with or without pull-high resistor (determined by pull-high
PA3/PFD
PA4/TMR
PA5/INT
PA6, PA7
Pull-high
Wake-up
I/O
I/O
PA3 or PFD options: bit option). The PFD, TMR and INT are pin-shared with PA3, PA4
and PA5, respectively.
Bidirectional 4-bit input/output port. Software instructions determine the
CMOS output, Schmitt trigger input with or without pull-high resistor (deter-
PB0/AN0
PB1/AN1
mined by pull-high options: bit option) or A/D input.
Pull-high
PB2/AN2
Once a PB line is selected as an A/D input (by using software control), the
SCL/PB3/AN3
I/O function and pull-high resistor are disabled automatically.
PB3/AN3 is wire-bonded with SCL pad of the Data EEPROM
Bidirectional I/O line. Software instructions determine the CMOS output,
Schmitt trigger input with or without a pull-high resistor (determined by
Pull-high
SDA/PD0/PWM I/O
pull-high options: bit option). The PWM output function is pin-shared with
PD0 or PWM
PD0 (dependent on PWM options).
PD0/PWM is wire-bonded with SDA pad of the Data EEPROM.
RES
VDD
VSS
I
Schmitt trigger reset input. Active low.
Positive power supply
¾
¾
¾
¾
¾
Negative power supply, ground.
OSC1, OSC2 are connected to an RC network or a Crystal (determined by
OSC1
OSC2
I
Crystal or RC options) for the internal system clock. In the case of RC operation, OSC2 is
the output terminal for 1/4 system clock.
O
Absolute Maximum Ratings
Supply Voltage...........................VSS-0.3V to VSS+6.0V
Input Voltage..............................VSS-0.3V to VDD+0.3V
Storage Temperature............................-50°C to 125°C
Operating Temperature...........................-40°C to 85°C
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
Rev. 1.30
3
July 13, 2005
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
