HT45F12
8-Bit Flash MCU with Op Amps & Comparators
EachꢀpinꢀonꢀPortꢀAꢀcanꢀbeꢀsetupꢀusingꢀtheꢀPAWUꢀregisterꢀtoꢀpermitꢀaꢀnegativeꢀtransitionꢀonꢀtheꢀpinꢀ
toꢀwake-upꢀtheꢀsystem.ꢀWhenꢀaꢀPortꢀAꢀpinꢀwake-upꢀoccurs,ꢀtheꢀprogramꢀwillꢀresumeꢀexecutionꢀatꢀ
theꢀinstructionꢀfollowingꢀtheꢀ“HALT”ꢀinstruction.ꢀIfꢀtheꢀsystemꢀisꢀwokenꢀupꢀbyꢀanꢀinterrupt,ꢀthenꢀ
twoꢀpossibleꢀsituationsꢀmayꢀoccur.ꢀTheꢀfirstꢀisꢀwhereꢀtheꢀrelatedꢀinterruptꢀisꢀdisabledꢀorꢀtheꢀinterruptꢀ
isꢀenabledꢀbutꢀtheꢀstackꢀisꢀfull,ꢀinꢀwhichꢀcaseꢀtheꢀprogramꢀwillꢀresumeꢀexecutionꢀatꢀtheꢀinstructionꢀ
followingꢀtheꢀ“HALT”ꢀinstruction.ꢀInꢀthisꢀsituation,ꢀtheꢀinterruptꢀwhichꢀwoke-upꢀtheꢀdeviceꢀwillꢀnotꢀ
beꢀimmediatelyꢀserviced,ꢀbutꢀwillꢀratherꢀbeꢀservicedꢀlaterꢀwhenꢀtheꢀrelatedꢀinterruptꢀisꢀfinallyꢀenabledꢀ
orꢀwhenꢀaꢀstackꢀlevelꢀbecomesꢀfree.ꢀTheꢀotherꢀsituationꢀisꢀwhereꢀtheꢀrelatedꢀinterruptꢀisꢀenabledꢀandꢀ
theꢀstackꢀisꢀnotꢀfull,ꢀinꢀwhichꢀcaseꢀtheꢀregularꢀinterruptꢀresponseꢀtakesꢀplace.ꢀIfꢀanꢀinterruptꢀrequestꢀ
flagꢀisꢀsetꢀhighꢀbeforeꢀenteringꢀtheꢀSLEEPꢀorꢀIDLEꢀMode,ꢀtheꢀwake-upꢀfunctionꢀofꢀtheꢀrelatedꢀ
interruptꢀwillꢀbeꢀdisabled.
Watchdog Timer
TheꢀWatchdogꢀTimerꢀisꢀprovidedꢀtoꢀpreventꢀprogramꢀmalfunctionsꢀorꢀsequencesꢀfromꢀjumpingꢀtoꢀ
unknownꢀlocations,ꢀdueꢀtoꢀcertainꢀuncontrollableꢀexternalꢀeventsꢀsuchꢀasꢀelectricalꢀnoise.
Watchdog Timer Clock Source
TheꢀWatchdogꢀTimerꢀclockꢀsourceꢀisꢀprovidedꢀbyꢀtheꢀinternalꢀclock,ꢀfS,ꢀwhichꢀisꢀinꢀturnꢀsuppliedꢀbyꢀ
theꢀLIRCꢀoscillator.ꢀTheꢀLIRCꢀinternalꢀoscillatorꢀhasꢀanꢀapproximateꢀperiodꢀofꢀ32ꢀkHzꢀatꢀaꢀsupplyꢀ
voltageꢀofꢀ5V.ꢀHowever,ꢀitꢀshouldꢀbeꢀnotedꢀthatꢀthisꢀspecifiedꢀinternalꢀclockꢀperiodꢀcanꢀvaryꢀwithꢀ
VDD,ꢀtemperatureꢀandꢀprocessꢀvariations.ꢀTheꢀWatchdogꢀTimerꢀsourceꢀclockꢀisꢀthenꢀsubdividedꢀbyꢀaꢀ
ratioꢀofꢀ28ꢀtoꢀ218ꢀtoꢀgiveꢀlongerꢀtimeouts,ꢀtheꢀactualꢀvalueꢀbeingꢀchosenꢀusingꢀtheꢀWS2~WS0ꢀbitsꢀinꢀ
theꢀWDTCꢀregister.
Watchdog Timer Control Register
Aꢀsingleꢀregister,ꢀWDTC,ꢀcontrolsꢀtheꢀrequiredꢀtimeoutꢀperiodꢀasꢀwellꢀasꢀtheꢀenable/disableꢀ
operation.ꢀThisꢀregisterꢀtogetherꢀwithꢀseveralꢀconfigurationꢀoptionsꢀcontrolꢀtheꢀoverallꢀoperationꢀofꢀ
theꢀWatchdogꢀTimer.
WDTC Register
Bit
Naꢁe
R/W
7
6
5
4
3
2
1
0
WE4
R/W
0
WE3
R/W
1
WEꢄ
R/W
0
WE1
R/W
1
WE0
R/W
0
W�ꢄ
R/W
0
W�1
R/W
1
W�0
R/W
1
POR
Bitꢀ7ꢀ~ꢀ3ꢀ
WE4 ~ WE0:ꢀWDTꢀenableꢀbitꢀ
IfꢀtheꢀWDTꢀconfigurationꢀoptionꢀisꢀselectedꢀasꢀ“AlwaysꢀEnabled”:ꢀ
ꢀ 10101ꢀorꢀ01010:ꢀEnabledꢀ
ꢀ Other:ꢀResetꢀMCUꢀ
IfꢀtheꢀWDTꢀconfigurationꢀoptionꢀisꢀselectedꢀasꢀ“ApplicationꢀProgramꢀEnabled”:ꢀ
ꢀ 10101:ꢀDisabledꢀ
ꢀ 01010:ꢀEnabledꢀ
ꢀ OtherꢀValues:ꢀResetꢀMCU
Ifꢀtheseꢀbitsꢀareꢀchangedꢀdueꢀtoꢀadverseꢀenvironmentalꢀconditions,ꢀtheꢀmicrocontrollerꢀ
willꢀbeꢀreset.ꢀTheꢀresetꢀoperationꢀwillꢀbeꢀactivatedꢀafterꢀ2~3ꢀLIRCꢀclockꢀcyclesꢀandꢀtheꢀ
WRFꢀbitꢀinꢀtheꢀCTRLꢀregisterꢀwillꢀbeꢀsetꢀtoꢀ1.
Rev. 0.00
45
�eꢀteꢁꢂeꢃ ꢄꢅꢆ ꢄ01ꢄ