HT45F12
8-Bit Flash MCU with Op Amps & Comparators
Reading Data from the EEPROM
ToꢀreadꢀdataꢀfromꢀtheꢀEEPROM,ꢀtheꢀreadꢀenableꢀbit,ꢀRDEN,ꢀinꢀtheꢀEECTRLꢀregisterꢀmustꢀfirstꢀ
beꢀsetꢀhighꢀtoꢀenableꢀtheꢀreadꢀfunction.ꢀTheꢀEEPROMꢀaddressꢀofꢀtheꢀdataꢀtoꢀbeꢀreadꢀmustꢀthenꢀbeꢀ
placedꢀinꢀtheꢀEEADDRꢀregister.ꢀIfꢀtheꢀRDꢀbitꢀinꢀtheꢀEECTRLꢀregisterꢀisꢀnowꢀsetꢀhigh,ꢀaꢀreadꢀcycleꢀ
willꢀbeꢀinitiated.ꢀSettingꢀtheꢀRDꢀbitꢀhighꢀwillꢀnotꢀinitiateꢀaꢀreadꢀoperationꢀifꢀtheꢀRDENꢀbitꢀhasꢀnotꢀ
beenꢀset.ꢀWhenꢀtheꢀreadꢀcycleꢀterminates,ꢀtheꢀRDꢀbitꢀwillꢀbeꢀautomaticallyꢀclearedꢀtoꢀzero,ꢀafterꢀ
whichꢀtheꢀdataꢀcanꢀbeꢀreadꢀfromꢀtheꢀEEDATAꢀregister.ꢀTheꢀdataꢀwillꢀremainꢀinꢀtheꢀEEDATAꢀregisterꢀ
untilꢀanotherꢀreadꢀorꢀwriteꢀoperationꢀisꢀexecuted.ꢀTheꢀapplicationꢀprogramꢀcanꢀpollꢀtheꢀRDꢀbitꢀtoꢀ
determineꢀwhenꢀtheꢀdataꢀisꢀvalidꢀforꢀreading.
Writing Data to the EEPROM
ToꢀwriteꢀdataꢀtoꢀtheꢀEEPROM,ꢀtheꢀwriteꢀenableꢀbit,ꢀWTEN,ꢀinꢀtheꢀEECTRLꢀregisterꢀmustꢀfirstꢀbeꢀ
setꢀhighꢀtoꢀenableꢀtheꢀwriteꢀfunction.ꢀTheꢀEEPROMꢀaddressꢀofꢀtheꢀdataꢀtoꢀbeꢀwrittenꢀmustꢀthenꢀbeꢀ
placedꢀinꢀtheꢀEEADDRꢀregisterꢀandꢀtheꢀdataꢀplacedꢀinꢀtheꢀEEDATAꢀregister.ꢀIfꢀtheꢀWTꢀbitꢀinꢀtheꢀ
EECTRLꢀregisterꢀisꢀnowꢀsetꢀhigh,ꢀanꢀinternalꢀwriteꢀcycleꢀwillꢀthenꢀbeꢀinitiated.ꢀSettingꢀtheꢀWTꢀbitꢀ
highꢀwillꢀnotꢀinitiateꢀaꢀwriteꢀcycleꢀifꢀtheꢀWTENꢀbitꢀhasꢀnotꢀbeenꢀset.ꢀAsꢀtheꢀEEPROMꢀwriteꢀcycleꢀ
isꢀcontrolledꢀusingꢀanꢀinternalꢀtimerꢀwhoseꢀoperationꢀisꢀasynchronousꢀtoꢀmicrocontrollerꢀsystemꢀ
clock,ꢀaꢀcertainꢀtimeꢀwillꢀelapseꢀbeforeꢀtheꢀdataꢀwillꢀhaveꢀbeenꢀwrittenꢀintoꢀtheꢀEEPROM.ꢀDetectingꢀ
whenꢀtheꢀwriteꢀcycleꢀhasꢀfinishedꢀcanꢀbeꢀimplementedꢀeitherꢀbyꢀpollingꢀtheꢀWTꢀbitꢀinꢀtheꢀEECTRLꢀ
registerꢀorꢀbyꢀusingꢀtheꢀEEPROMꢀinterrupt.ꢀWhenꢀtheꢀwriteꢀcycleꢀterminates,ꢀtheꢀWTꢀbitꢀwillꢀbeꢀ
automaticallyꢀclearedꢀtoꢀzeroꢀbyꢀtheꢀmicrocontroller,ꢀinformingꢀtheꢀuserꢀthatꢀtheꢀdataꢀhasꢀbeenꢀ
writtenꢀtoꢀtheꢀEEPROM.ꢀTheꢀapplicationꢀprogramꢀcanꢀthereforeꢀpollꢀtheꢀWTꢀbitꢀtoꢀdetermineꢀwhenꢀ
theꢀwriteꢀcycleꢀhasꢀended.
Write Protection
Protectionꢀagainstꢀinadvertentꢀwriteꢀoperationꢀisꢀprovidedꢀinꢀseveralꢀways.ꢀAfterꢀtheꢀdeviceꢀisꢀ
powered-onꢀtheꢀWriteꢀEnableꢀbitꢀinꢀtheꢀcontrolꢀregisterꢀwillꢀbeꢀclearedꢀpreventingꢀanyꢀwriteꢀ
operations.ꢀAlsoꢀatꢀpower-onꢀtheꢀBankꢀPointer,ꢀBP,ꢀwillꢀbeꢀresetꢀtoꢀzero,ꢀwhichꢀmeansꢀthatꢀDataꢀ
MemoryꢀBankꢀ0ꢀwillꢀbeꢀselected.ꢀAsꢀtheꢀEEPROMꢀcontrolꢀregisterꢀisꢀlocatedꢀinꢀBankꢀ1,ꢀthisꢀaddsꢀaꢀ
furtherꢀmeasureꢀofꢀprotectionꢀagainstꢀspuriousꢀwriteꢀoperations.ꢀDuringꢀnormalꢀprogramꢀoperation,ꢀ
ensuringꢀthatꢀtheꢀWriteꢀEnableꢀbitꢀinꢀtheꢀcontrolꢀregisterꢀisꢀclearedꢀwillꢀsafeguardꢀagainstꢀincorrectꢀ
writeꢀoperations.
EEPROM Interrupt
TheꢀEEPROMꢀwriteꢀorꢀreadꢀinterruptꢀisꢀgeneratedꢀwhenꢀanꢀEEPROMꢀwriteꢀorꢀreadꢀcycleꢀhasꢀended.ꢀ
TheꢀEEPROMꢀinterruptꢀmustꢀfirstꢀbeꢀenabledꢀbyꢀsettingꢀtheꢀE2Iꢀbitꢀinꢀtheꢀrelevantꢀinterruptꢀregister.ꢀ
HoweverꢀasꢀtheꢀEEPROMꢀisꢀcontainedꢀwithinꢀaꢀMulti-functionꢀInterrupt,ꢀtheꢀassociatedꢀmulti-
functionꢀinterruptꢀenableꢀbitꢀmustꢀalsoꢀbeꢀset.ꢀWhenꢀanꢀEEPROMꢀwriteꢀcycleꢀends,ꢀtheꢀE2Fꢀrequestꢀ
flagꢀandꢀitsꢀassociatedꢀmulti-functionꢀinterruptꢀrequestꢀflagꢀwillꢀbothꢀbeꢀset.ꢀIfꢀtheꢀglobal,ꢀEEPROMꢀ
andꢀMulti-functionꢀinterruptsꢀareꢀenabledꢀandꢀtheꢀstackꢀisꢀnotꢀfull,ꢀaꢀjumpꢀtoꢀtheꢀassociatedꢀMulti-
functionꢀInterruptꢀvectorꢀwillꢀtakeꢀplace.ꢀWhenꢀtheꢀinterruptꢀisꢀservicedꢀonlyꢀtheꢀMulti-functionꢀ
interruptꢀflagꢀwillꢀbeꢀautomaticallyꢀreset,ꢀtheꢀEEPROMꢀinterruptꢀflagꢀmustꢀbeꢀmanuallyꢀresetꢀbyꢀtheꢀ
applicationꢀprogram.ꢀMoreꢀdetailsꢀcanꢀbeꢀobtainedꢀinꢀtheꢀInterruptꢀsection.
Rev. 0.00
31
�eꢀteꢁꢂeꢃ ꢄꢅꢆ ꢄ01ꢄ